17521651. VOLTAGE LEVEL SHIFTING WITH REDUCED TIMING DEGRADATION simplified abstract (QUALCOMM Incorporated)

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VOLTAGE LEVEL SHIFTING WITH REDUCED TIMING DEGRADATION

Organization Name

QUALCOMM Incorporated

Inventor(s)

Wilson Jianbo Chen of San Diego CA (US)

Aliasgar Presswala of Woodland Hills CA (US)

Chiew-Guan (Kelvin) Tan of San Diego CA (US)

VOLTAGE LEVEL SHIFTING WITH REDUCED TIMING DEGRADATION - A simplified explanation of the abstract

This abstract first appeared for US patent application 17521651 titled 'VOLTAGE LEVEL SHIFTING WITH REDUCED TIMING DEGRADATION

Simplified Explanation

The patent application describes an apparatus that includes a first field effect transistor (FET) and a first inverter, both connected between two voltage rails. The first FET receives a first input signal in a first voltage domain, while the first inverter receives a second input signal in a second voltage domain. The first output signal generated by the first inverter is based on the first and second input signals. The apparatus also includes additional circuitry to process signals in a third voltage domain.

  • The apparatus includes a first FET and a first inverter connected in series between two voltage rails.
  • The first FET receives a first input signal in a first voltage domain.
  • The first inverter receives a second input signal in a second voltage domain.
  • The first output signal generated by the first inverter is based on the first and second input signals.
  • The apparatus includes additional circuitry to process signals in a third voltage domain.

Potential Applications

  • This apparatus can be used in various electronic devices that require signal processing in different voltage domains.
  • It can be applied in communication systems, data processing systems, and other devices that handle signals with different voltage levels.

Problems Solved

  • The apparatus solves the problem of processing signals with different voltage domains in a single device.
  • It eliminates the need for separate components or systems to handle signals with different voltage levels.

Benefits

  • The apparatus provides a compact and efficient solution for processing signals in different voltage domains.
  • It simplifies the design and manufacturing process of electronic devices by integrating multiple voltage domains in a single apparatus.
  • It reduces the overall cost and complexity of electronic systems by eliminating the need for additional components or systems to handle different voltage levels.


Original Abstract Submitted

An aspect of the disclosure relates to an apparatus including a first field effect transistor (FET) including a first gate configured to receive a first input signal that varies in accordance with a first voltage domain; and a first inverter including a first input configured to receive a second input signal that varies in accordance with a second voltage domain, and a first output configured to generate a first output signal that varies in accordance with the second voltage domain, wherein the first output signal is based on the first and second input signals, and wherein the first FET and the first inverter are coupled in series between first and second voltage rails. Per another aspect, the apparatus includes additional circuitry to allow the apparatus to process signals in accordance with a third voltage domain.

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