17494101. STACKED COMPLEMENTARY FIELD EFFECT TRANSISTORS simplified abstract (International Business Machines Corporation)

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STACKED COMPLEMENTARY FIELD EFFECT TRANSISTORS

Organization Name

International Business Machines Corporation

Inventor(s)

HUIMEI Zhou of Albany NY (US)

Alexander Reznicek of Troy NY (US)

MIAOMIAO Wang of Albany NY (US)

Ruilong Xie of Niskayuna NY (US)

STACKED COMPLEMENTARY FIELD EFFECT TRANSISTORS - A simplified explanation of the abstract

This abstract first appeared for US patent application 17494101 titled 'STACKED COMPLEMENTARY FIELD EFFECT TRANSISTORS

Simplified Explanation

The abstract describes a patent application for a complementary field effect transistor (CFET) structure. The structure consists of two transistors stacked on top of each other, with the source/drain regions of the first transistor positioned above the source/drain regions of the second transistor. The source/drain regions are connected to separate source/drain contacts. An L-shaped isolation element, composed of vertical and horizontal isolation elements, separates the two source/drain contacts.

  • The patent application describes a CFET structure with a unique arrangement of transistors and source/drain contacts.
  • The first transistor is positioned above the second transistor, allowing for a compact design.
  • The source/drain regions of the first transistor are located above the source/drain regions of the second transistor.
  • Separate source/drain contacts are provided for each transistor.
  • An L-shaped isolation element, consisting of vertical and horizontal isolation elements, isolates the two source/drain contacts.

Potential Applications

  • Integrated circuits
  • Semiconductor devices
  • Electronics manufacturing

Problems Solved

  • Compact design: The stacked arrangement of transistors allows for a more compact structure, saving space in integrated circuits.
  • Isolation: The L-shaped isolation element effectively isolates the source/drain contacts, preventing interference between the transistors.

Benefits

  • Space-saving: The compact design of the CFET structure saves space in integrated circuits, allowing for more components to be packed into a smaller area.
  • Improved performance: The isolation provided by the L-shaped isolation element helps to prevent interference and improve the overall performance of the CFET structure.


Original Abstract Submitted

A CFET (complementary field effect transistor) structure including a first transistor disposed above a second transistor, a first source/drain region of the first transistor disposed above a second source/drain region of the second transistor, a first source/drain contact for the first source/drain region, and a second source drain contact for the second source drain region. The first source/drain contact is isolated from the second source/drain contact by an L-shaped isolation element including vertical and horizontal isolation elements.