17494009. LOW VERTICAL RESISTANCE SINGLE DAMASCENE INTERCONNECT simplified abstract (International Business Machines Corporation)

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LOW VERTICAL RESISTANCE SINGLE DAMASCENE INTERCONNECT

Organization Name

International Business Machines Corporation

Inventor(s)

Takeshi Nogami of Schenectady NY (US)

Balasubramanian Pranatharthiharan of Watervliet NY (US)

Prasad Bhosale of Albany NY (US)

LOW VERTICAL RESISTANCE SINGLE DAMASCENE INTERCONNECT - A simplified explanation of the abstract

This abstract first appeared for US patent application 17494009 titled 'LOW VERTICAL RESISTANCE SINGLE DAMASCENE INTERCONNECT

Simplified Explanation

The abstract describes a multi-layer integrated circuit (IC) structure with a back-end-of-line (BEOL) region that includes a dielectric. The structure includes a single damascene interconnect in the BEOL region, which consists of a first line structure in a first line trench and a via structure in a via trench. The first line structure includes a first line element and a first liner, while the via structure includes a via element and a via liner. The first line element is physically and electrically connected to the via element at a first-line-via interface.

  • The invention is a multi-layer integrated circuit structure with a single damascene interconnect in the back-end-of-line (BEOL) region.
  • The single damascene interconnect consists of a first line structure in a first line trench and a via structure in a via trench.
  • The first line structure includes a first line element and a first liner, while the via structure includes a via element and a via liner.
  • The first line element is physically and electrically connected to the via element at a first-line-via interface.

Potential Applications

  • This technology can be applied in the manufacturing of integrated circuits for various electronic devices such as smartphones, computers, and IoT devices.
  • It can be used in the development of high-performance processors, memory chips, and other advanced electronic components.

Problems Solved

  • The invention addresses the need for a more efficient and reliable interconnect structure in the back-end-of-line region of integrated circuits.
  • It solves the problem of connecting different layers of an integrated circuit while minimizing signal loss and power consumption.

Benefits

  • The multi-layer integrated circuit structure provides improved performance and reliability.
  • The single damascene interconnect simplifies the manufacturing process and reduces production costs.
  • The physical and electrical coupling at the first-line-via interface ensures efficient signal transmission between different layers of the integrated circuit.


Original Abstract Submitted

Embodiments of the invention include a multi-layer integrated circuit (IC) structure having a back-end-of-line (BEOL) region that includes a dielectric. A single damascene interconnect is in the BEOL region, wherein the single damascene interconnect includes a first line structure in a first line trench of the BEOL region; and a via structure in a via trench of the BEOL region. The first line structure includes a first line element and a first liner. The via structure includes a via element and a via liner. The first line element is physically coupled to inner walls of the first line trench through the first liner. The via element is physically coupled to inner walls of the via trench through the via liner. The first line element is physically coupled and electrically coupled to the via element at a first-line-via interface.

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