View source for 17491012. TWO-TERMINAL MEMORY DEVICE, A METHOD FOR MANUFACTURING THE SAME, AND A SEMICONDUCTOR DEVICE INCLUDING A TWO-TERMINAL MEMORY DEVICE simplified abstract (Kia Corporation)

=TWO-TERMINAL MEMORY DEVICE, A METHOD FOR MANUFACTURING THE SAME, AND A SEMICONDUCTOR DEVICE INCLUDING A TWO-TERMINAL MEMORY DEVICE=


==Organization Name==

[[:Category:Kia Corporation|Kia Corporation]]


[[Category:Kia Corporation]]

==Inventor(s)==

[[:Category:Ui-Yeon Won of Ansan-si (KR)|Ui-Yeon Won of Ansan-si (KR)]][[Category:Ui-Yeon Won of Ansan-si (KR)]]

[[:Category:Jong-Seok Lee of Suwon-si (KR)|Jong-Seok Lee of Suwon-si (KR)]][[Category:Jong-Seok Lee of Suwon-si (KR)]]

[[:Category:Sang-Hyeok Yang of Suwon-si (KR)|Sang-Hyeok Yang of Suwon-si (KR)]][[Category:Sang-Hyeok Yang of Suwon-si (KR)]]

==TWO-TERMINAL MEMORY DEVICE, A METHOD FOR MANUFACTURING THE SAME, AND A SEMICONDUCTOR DEVICE INCLUDING A TWO-TERMINAL MEMORY DEVICE - A simplified explanation of the abstract==


This abstract first appeared for US patent application 17491012 titled 'TWO-TERMINAL MEMORY DEVICE, A METHOD FOR MANUFACTURING THE SAME, AND A SEMICONDUCTOR DEVICE INCLUDING A TWO-TERMINAL MEMORY DEVICE

==Simplified Explanation==

==Abstract==
A two-terminal memory device is described in this patent application. The device includes a substrate, a source, and a drain formed on the substrate's upper surface, a ferroelectric layer connected to the source and drain, and an extended drain laminated on the ferroelectric layer. This memory device can be used as a cross-point type and neuromorphic device, allowing for multiple resistance levels with switchable resistance layers.

==Patent/Innovation Explanation==
* Two-terminal memory device with a substrate, source, and drain.
* Ferroelectric layer connected to the source and drain.
* Extended drain laminated on the ferroelectric layer.
* Enables cross-point type and neuromorphic device functionality.
* Allows for multiple resistance levels with switchable resistance layers.

==Potential Applications==
This technology has potential applications in various fields, including:
* Memory devices for electronic devices and computers.
* Neuromorphic computing for artificial intelligence and machine learning.
* Cross-point memory arrays for high-density data storage.
* Non-volatile memory for low-power consumption devices.

==Problems Solved==
The two-terminal memory device solves several problems in the field of memory technology, including:
* Limited resistance levels in traditional memory devices.
* Complex circuitry required for implementing multi-resistance levels.
* High power consumption in memory devices.
* Lack of compatibility with neuromorphic computing.

==Benefits==
The benefits of this two-terminal memory device are:
* Ability to implement multiple resistance levels.
* Simplified circuitry for multi-resistance level implementation.
* Lower power consumption compared to traditional memory devices.
* Compatibility with neuromorphic computing.
* High-density data storage capabilities.


==Original Abstract Submitted==

A two-terminal memory device including: a substrate; a source and a drain formed to face each other on an upper surface of the substrate; a ferroelectric layer connected to the source and the drain and formed between the source and the drain; and an extended drain extending from the drain and laminated on the ferroelectric layer. The two-terminal memory device may be applied as a cross-point type and neuromorphic device capable of implementing multi-resistance levels with multi-layer switchable resistance layers.



[[Category:H01L27/11507]]
[[Category:H01L49/02]]