17463123. CHANNEL STRUCTURES FOR SEMICONDUCTOR DEVICES simplified abstract (TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.)

CHANNEL STRUCTURES FOR SEMICONDUCTOR DEVICES

Organization Name

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor(s)

Ding-Kang Shih of New Taipei City (TW)

Pang-Yen Tsai of Jhu-bei City (TW)

CHANNEL STRUCTURES FOR SEMICONDUCTOR DEVICES - A simplified explanation of the abstract

This abstract first appeared for US patent application 17463123 titled 'CHANNEL STRUCTURES FOR SEMICONDUCTOR DEVICES

Simplified Explanation

The present disclosure describes a method for fabricating channel structures in a semiconductor device using a superlattice structure and germanium epitaxial growth layer. The method involves forming multiple gate openings by removing certain layers, followed by the formation of a germanium epitaxial growth layer on the remaining layers. This layer is then annealed to form a cladding layer around the remaining layers.

• The method involves forming a superlattice structure with nanostructured layers on a fin structure.
• The second nanostructured layers are removed to create multiple gate openings.
• A germanium epitaxial growth layer is formed on the remaining first nanostructured layers.
• The temperature and pressure are increased over a predetermined period of time.
• The germanium epitaxial growth layer is annealed to form a cladding layer around the first nanostructured layers.

Potential applications of this technology:

• This method can be used in the fabrication of semiconductor devices, such as transistors.
• It can improve the performance and efficiency of these devices by enhancing the channel structures.

Problems solved by this technology:

• This method solves the problem of forming channel structures in a semiconductor device with improved precision and control.
• It addresses the challenge of creating a cladding layer around the nanostructured layers.

Benefits of this technology:

• The use of a superlattice structure and germanium epitaxial growth layer improves the performance and efficiency of semiconductor devices.
• The method allows for precise control over the formation of channel structures, leading to better device performance.
• The resulting cladding layer enhances the stability and reliability of the semiconductor device.

Original Abstract Submitted

The present disclosure provides channel structures of a semiconductor device and fabricating methods thereof. The method can include forming a superlattice structure with first nanostructured layers and second nanostructured layers on a fin structure. The method can also include removing the second nanostructured layers to form multiple gate openings; forming a germanium epitaxial growth layer on the first nanostructured layers at a first temperature and a first pressure; and increasing the first temperature to a second temperature and increasing the first pressure to a second pressure over a first predetermined period of time. The method can further include annealing the germanium epitaxial growth layer at the second temperature and the second pressure in the chamber over a second predetermined period of time to form a cladding layer surrounding the first nanostructured layers.