17460340. SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME simplified abstract (TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.)

SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME

Organization Name

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor(s)

Hao-Yi Tsai of Hsinchu City (TW)

Cheng-Chieh Hsieh of Tainan (TW)

Tsung-Hsien Chiang of Hsinchu (TW)

Hui-Chun Chiang of Hsinchu (TW)

Tzu-Sung Huang of Tainan City (TW)

Ming-Hung Tseng of Miaoli County (TW)

Kris Lipu Chuang of Hsinchu City (TW)

Chung-Ming Weng of Hsinchu (TW)

Tsung-Yuan Yu of Taipei City (TW)

Tzuan-Horng Liu of Taoyuan County (TW)

SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 17460340 titled 'SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME

Simplified Explanation

The patent application describes a semiconductor package that includes multiple semiconductor dies and insulating encapsulations. It also includes a through silicon via (TSV) and a conductor structure for electrical connections.

• The semiconductor package includes a first semiconductor die and a second semiconductor die.
• The first semiconductor die has a through silicon via (TSV) that extends from one side to the other side of the semiconductor substrate.
• The second semiconductor die is placed on one side of the first semiconductor die.
• The first insulating encapsulation covers the second semiconductor die and encapsulates the first semiconductor die.
• The terminal of the TSV is at the same level as the surface of the first insulating encapsulation.
• A dielectric layer structure covers the first semiconductor die and the first insulating encapsulation.
• A conductor structure passes through the dielectric layer structure and makes contact with the TSV.
• The second insulating encapsulation contacts the second semiconductor die, the first insulating encapsulation, and the dielectric layer structure.

Potential applications of this technology:

• Semiconductor packaging for integrated circuits.
• High-density electronic devices.
• Microprocessors and memory chips.

Problems solved by this technology:

• Provides a compact and efficient way to package multiple semiconductor dies.
• Enables electrical connections between the dies through the TSV and conductor structure.
• Protects the dies from external factors such as moisture and physical damage.

Benefits of this technology:

• Improved performance and reliability of semiconductor devices.
• Higher integration density and smaller form factor.
• Enhanced electrical connectivity and signal transmission.

Original Abstract Submitted

A semiconductor package including a first semiconductor die, a second semiconductor die, a first insulating encapsulation, a dielectric layer structure, a conductor structure and a second insulating encapsulation is provided. The first semiconductor die includes a first semiconductor substrate and a through silicon via (TSV) extending from a first side to a second side of the semiconductor substrate. The second semiconductor die is disposed on the first side of the semiconductor substrate. The first insulating encapsulation on the second semiconductor die encapsulates the first semiconductor die. A terminal of the TSV is coplanar with a surface of the first insulating encapsulation. The dielectric layer structure covers the first semiconductor die and the first insulating encapsulation. The conductor structure extends through the dielectric layer structure and contacts with the through silicon via. The second insulating encapsulation contacts with the second semiconductor die, the first insulting encapsulation, and the dielectric layer structure.