17460097. METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND A SEMICONDUCTOR DEVICE simplified abstract (TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.)
Contents
METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND A SEMICONDUCTOR DEVICE
Organization Name
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Inventor(s)
Hsu Ming Hsiao of Hsinchu (TW)
Shiang-Bau Wang of Pingzchen City (TW)
Che-Fu Chen of Taipei City (TW)
METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND A SEMICONDUCTOR DEVICE - A simplified explanation of the abstract
This abstract first appeared for US patent application 17460097 titled 'METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND A SEMICONDUCTOR DEVICE
Simplified Explanation
The patent application describes a method of manufacturing a semiconductor device. Here are the key points:
- A sacrificial gate structure with a sacrificial gate electrode is formed over a substrate.
- A first dielectric layer is formed over the sacrificial gate structure.
- A second dielectric layer is formed over the first dielectric layer.
- The second and first dielectric layers are planarized and recessed, exposing the upper portion of the sacrificial gate structure.
- A third dielectric layer is formed over the exposed sacrificial gate structure and the first dielectric layer.
- A fourth dielectric layer is formed over the third dielectric layer.
- The fourth and third dielectric layers are planarized, exposing the sacrificial gate electrode and leaving part of the third dielectric layer on the recessed first dielectric layer.
- The recessing of the first dielectric layer involves two etching operations, with different etching agents used in each operation.
Potential applications of this technology:
- Manufacturing of semiconductor devices, such as integrated circuits and transistors.
Problems solved by this technology:
- Provides a method for forming a sacrificial gate structure in a semiconductor device.
- Allows for the planarization and recessing of dielectric layers to expose the sacrificial gate structure.
- Enables the formation of multiple dielectric layers with different etching agents.
Benefits of this technology:
- Simplifies the manufacturing process of semiconductor devices.
- Provides better control over the formation and etching of dielectric layers.
- Allows for the precise exposure of the sacrificial gate electrode.
Original Abstract Submitted
In a method of manufacturing a semiconductor device, a sacrificial gate structure including sacrificial gate electrode is formed over a substrate. A first dielectric layer is formed over the sacrificial gate structure. A second dielectric layer is formed over the first dielectric layer. The second and first dielectric layers are planarized and recessed, and an upper portion of the sacrificial gate structure is exposed. A third dielectric layer is formed over the exposed sacrificial gate structure and over the first dielectric layer. A fourth dielectric layer is formed over the third dielectric layer. The fourth and third dielectric layers are planarized, and the sacrificial gate electrode is exposed and part of the third dielectric layer remains on the recessed first dielectric layer. The recessing the first dielectric layer comprises a first etching operation and a second etching operation using a different etching as from the first etching operation.
