17453841. HIGH-DENSITY RESISTIVE RANDOM-ACCESS MEMORY ARRAY WITH SELF-ALIGNED BOTTOM ELECTRODE CONTACT simplified abstract (International Business Machines Corporation)

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HIGH-DENSITY RESISTIVE RANDOM-ACCESS MEMORY ARRAY WITH SELF-ALIGNED BOTTOM ELECTRODE CONTACT

Organization Name

International Business Machines Corporation

Inventor(s)

Dexin Kong of Redmond WA (US)

Ekmini Anuja De Silva of Slingerlands NY (US)

Ashim Dutta of Clifton Park NY (US)

Daniel Schmidt of Niskayuna NY (US)

HIGH-DENSITY RESISTIVE RANDOM-ACCESS MEMORY ARRAY WITH SELF-ALIGNED BOTTOM ELECTRODE CONTACT - A simplified explanation of the abstract

This abstract first appeared for US patent application 17453841 titled 'HIGH-DENSITY RESISTIVE RANDOM-ACCESS MEMORY ARRAY WITH SELF-ALIGNED BOTTOM ELECTRODE CONTACT

Simplified Explanation

The patent application describes a high-density resistive random-access memory (RRAM) array with a self-aligned bottom electrode contact. The array includes electrically conductive structures embedded in an interconnect dielectric material layer, a bottom electrode grown over and connected to each conductive structure, and a first dielectric filling layer separating the bottom electrodes above different conductive structures. The bottom electrode has a semi-circular shape, and a resistive random-access memory pillar is placed above it.

  • The patent application describes a high-density RRAM array with a self-aligned bottom electrode contact.
  • The array includes electrically conductive structures embedded in an interconnect dielectric material layer.
  • A bottom electrode is selectively grown over and connected to each conductive structure.
  • The bottom electrode above one conductive structure is separated from the bottom electrode above another conductive structure by a first dielectric filling layer.
  • The bottom electrode has a semi-circular shape.
  • A resistive random-access memory pillar is placed above the bottom electrode.

Potential Applications

This technology has potential applications in various fields, including:

  • Memory devices: The high-density RRAM array can be used in memory devices, such as solid-state drives (SSDs) and computer memory modules.
  • Internet of Things (IoT): The compact design and high-density of the RRAM array make it suitable for IoT devices that require low power consumption and small form factors.
  • Artificial intelligence (AI): RRAM arrays can be used in AI applications, such as neural networks and deep learning, to improve processing speed and efficiency.

Problems Solved

The patent application addresses the following problems:

  • High-density RRAM arrays often suffer from poor scalability and reliability due to issues with bottom electrode contacts.
  • Self-aligned bottom electrode contacts help to overcome these issues by providing a more reliable and scalable solution.
  • The semi-circular shape of the bottom electrode allows for better control of the electrical properties and performance of the RRAM array.

Benefits

The technology described in the patent application offers several benefits:

  • Improved scalability: The self-aligned bottom electrode contact enables higher density RRAM arrays without sacrificing reliability.
  • Enhanced reliability: The design of the bottom electrode contact improves the reliability and stability of the RRAM array.
  • Better performance: The semi-circular shape of the bottom electrode allows for better control of electrical properties, leading to improved performance of the RRAM array.


Original Abstract Submitted

A high-density resistive random-access memory array with self-aligned bottom electrode contact includes a plurality of electrically conductive structures embedded in an interconnect dielectric material layer, a bottom electrode selectively grown over, and electrically connected to, each of the electrically conductive structures with the bottom electrode above an electrically conductive structure being separated from the bottom electrode above another electrically conductive structure by a first dielectric filling layer, the bottom electrode having a semi-circular shape. The array further includes a resistive random-access memory pillar disposed above the bottom electrode.

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