17446405. RESISTOR WITHIN A VIA simplified abstract (TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.)

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RESISTOR WITHIN A VIA

Organization Name

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor(s)

Chi-Han Yang of Hsinchu (TW)

RESISTOR WITHIN A VIA - A simplified explanation of the abstract

This abstract first appeared for US patent application 17446405 titled 'RESISTOR WITHIN A VIA

Simplified Explanation

The patent application describes a method for forming a via in a semiconductor device using semiconductor processing tools. The method involves several steps, including depositing a metal plug, an oxide-based layer, a resistor, and landing pads on the resistor. Finally, metal plugs are deposited on the landing pads.

  • The patent application describes a method for forming a via in a semiconductor device.
  • Semiconductor processing tools are used to deposit a metal plug within the via.
  • An oxide-based layer is then deposited on the metal plug within the via.
  • A resistor is deposited on the oxide-based layer within the via.
  • Landing pads are deposited on the resistor within the via.
  • Metal plugs are deposited on the landing pads.

Potential Applications

  • This technology can be used in the manufacturing of semiconductor devices.
  • It can be applied in various industries that utilize semiconductor devices, such as electronics, telecommunications, and automotive.

Problems Solved

  • The method provides a reliable and efficient way to form a via in a semiconductor device.
  • It ensures proper deposition of the metal plug, oxide-based layer, resistor, and landing pads within the via.

Benefits

  • The method allows for precise and controlled formation of vias in semiconductor devices.
  • It enables the integration of resistors and landing pads within the via, reducing the need for additional components.
  • The technology improves the overall performance and functionality of semiconductor devices.


Original Abstract Submitted

In some implementations, one or more semiconductor processing tools may form a via for a semiconductor device. The one or more semiconductor processing tools may deposit a metal plug within the via. The one or more semiconductor processing tools may deposit an oxide-based layer on the metal plug within the via. The one or more semiconductor processing tools may deposit a resistor on the oxide-based layer within the via. The one or more semiconductor processing tools may deposit a first landing pad and a second landing pad on the resistor within the via. The one or more semiconductor processing tools may deposit a first metal plug on the first landing pad and a second metal plug on the second landing pad.

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