17392005. SIGNAL POWER SPLITTER/COMBINER WITH RESISTANCE AND IMPEDANCE TRANSFORMER LOADING simplified abstract (QUALCOMM Incorporated)
SIGNAL POWER SPLITTER/COMBINER WITH RESISTANCE AND IMPEDANCE TRANSFORMER LOADING
Organization Name
Inventor(s)
Jonghae Kim of San Diego CA (US)
Sang-June Park of San Diego CA (US)
Periannan Chidambaram of San Diego CA (US)
SIGNAL POWER SPLITTER/COMBINER WITH RESISTANCE AND IMPEDANCE TRANSFORMER LOADING - A simplified explanation of the abstract
This abstract first appeared for US patent application 17392005 titled 'SIGNAL POWER SPLITTER/COMBINER WITH RESISTANCE AND IMPEDANCE TRANSFORMER LOADING
Simplified Explanation
The abstract describes a signal power splitter/combiner that includes various components such as signal ports, resistors, impedance transformers, and intermediate nodes.
- The signal power splitter/combiner has a first signal port and three other signal ports.
- It includes resistors and impedance transformers to control the flow of signals between the ports.
- The second and third signal ports are connected to the first signal port through impedance transformers and intermediate nodes.
- A second resistor is connected between the second and third signal ports.
- Additional impedance transformers are included between the second impedance transformer and the second signal port, and between the third impedance transformer and the third signal port.
- A third resistor is connected to a third intermediate node.
Potential applications of this technology:
- Telecommunications systems
- Radio frequency (RF) signal processing
- Wireless communication networks
Problems solved by this technology:
- Efficiently splitting and combining signal power between multiple ports
- Maintaining signal integrity and minimizing signal loss
Benefits of this technology:
- Improved signal transmission and reception
- Enhanced network performance and reliability
- Simplified design and implementation of signal power splitting and combining systems
Original Abstract Submitted
An aspect relates to a signal power splitter/combiner including a first signal port; a first resistor; a first impedance transformer coupled in series with the first resistor between the first signal port and a first intermediate node; a second impedance transformer coupled between the first intermediate node and a second signal port; a third impedance transformer coupled between the first intermediate node and a third signal port; and a second resistor coupled between the second and third signal ports. The signal power splitter/combiner may further include a fourth impedance transformer coupled between the second impedance transformer and the second signal port, a fifth impedance transformer coupled between the third impedance transformer and the third signal port; and a third resistor coupled between a third intermediate nod.
