17381006. INTEGRATED CIRCUIT WITH NANOSHEET TRANSISTORS WITH METAL GATE PASSIVATION simplified abstract (TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.)

INTEGRATED CIRCUIT WITH NANOSHEET TRANSISTORS WITH METAL GATE PASSIVATION

Organization Name

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor(s)

Mao-Lin Huang of Hsinchu (TW)

Lung-Kun Chu of Hsinchu (TW)

Chung-Wei Hsu of Hsinchu (TW)

Jia-Ni Yu of Hsinchu (TW)

Kuo-Cheng Chiang of Hsinchu (TW)

Kuan-Lun Cheng of Hsinchu (TW)

Chih-Hao Wang of Hsinchu (TW)

INTEGRATED CIRCUIT WITH NANOSHEET TRANSISTORS WITH METAL GATE PASSIVATION - A simplified explanation of the abstract

This abstract first appeared for US patent application 17381006 titled 'INTEGRATED CIRCUIT WITH NANOSHEET TRANSISTORS WITH METAL GATE PASSIVATION

Simplified Explanation

The abstract describes a method for processing an integrated circuit that involves forming gate all around transistors of both N-type and P-type. The method includes depositing a metal gate layer for the P-type transistors and forming a passivation layer simultaneously with the metal gate layer.

• The method involves forming gate all around transistors, which provides improved control over the flow of electrical current.
• Both N-type and P-type transistors are included in the integrated circuit, allowing for a wider range of functionality.
• A metal gate layer is deposited specifically for the P-type transistors, enhancing their performance.
• The passivation layer is formed in-situ with the metal gate layer, simplifying the manufacturing process and reducing costs.

Potential Applications

This technology can be applied in various fields where integrated circuits are used, including:

• Consumer electronics
• Telecommunications
• Automotive industry
• Medical devices
• Industrial automation

Problems Solved

The method described in the patent application solves several problems associated with integrated circuit processing, such as:

• Lack of control over electrical current flow in traditional transistor designs
• Limited functionality due to the absence of both N-type and P-type transistors
• Performance limitations of P-type transistors without a metal gate layer
• Complex and costly manufacturing processes for forming passivation layers

Benefits

The use of this technology offers several benefits:

• Improved control and efficiency of electrical current flow
• Enhanced functionality and versatility of integrated circuits
• Higher performance of P-type transistors with the addition of a metal gate layer
• Simplified manufacturing process and reduced costs due to in-situ formation of the passivation layer

Original Abstract Submitted

A method for processing an integrated circuit includes forming N-type and P-type gate all around transistors and core gate all around transistors. The method deposits a metal gate layer for the P-type transistors. The method forms a passivation layer in-situ with the metal gate layer of the P-type transistor.