17893755. ERASE SUSPEND WITH CONFIGURABLE FORWARD PROGRESS simplified abstract (Micron Technology, Inc.)
ERASE SUSPEND WITH CONFIGURABLE FORWARD PROGRESS
Organization Name
Inventor(s)
Phil Reusswig of Fremont CA (US)
ERASE SUSPEND WITH CONFIGURABLE FORWARD PROGRESS - A simplified explanation of the abstract
This abstract first appeared for US patent application 17893755 titled 'ERASE SUSPEND WITH CONFIGURABLE FORWARD PROGRESS
Simplified Explanation
The present disclosure involves configuring a memory sub-system processor to manage memory erase operations by accessing a configuration register to identify a quantity of memory slices to erase. The processor then divides a set of memory components into multiple portions based on the identified quantity of memory slices to erase and performs read operations in association with the memory sub-system between erasure of each portion.
- Memory sub-system processor configured to manage memory erase operations
- Accesses configuration register to identify quantity of memory slices to erase
- Divides set of memory components into portions based on identified quantity
- Performs read operations between erasure of each portion
Potential Applications
- Data storage systems
- Solid-state drives
- Embedded systems
Problems Solved
- Efficient management of memory erase operations
- Improved performance of memory sub-system
- Enhanced data security through controlled erasure
Benefits
- Increased efficiency in memory management
- Enhanced performance of memory sub-system
- Improved data security and privacy protection
Original Abstract Submitted
Aspects of the present disclosure configure a memory sub-system processor to manage memory erase operations. The processor accesses a configuration register to identify a quantity of memory slices to erase. The processor divides a set of memory components into a plurality of portions based on the identified quantity of memory slices to erase and performs one or more read operations in association with the memory sub-system between erasure of each of the plurality of portions of the set of memory components.
