View source for 18152017. BI-DIRECTIONAL SCAN FLIP-FLOP CIRCUIT AND METHOD simplified abstract (Taiwan Semiconductor Manufacturing Co., Ltd.)

=BI-DIRECTIONAL SCAN FLIP-FLOP CIRCUIT AND METHOD=


==Organization Name==

[[:Category:Taiwan Semiconductor Manufacturing Co., Ltd.|Taiwan Semiconductor Manufacturing Co., Ltd.]]


[[Category:Taiwan Semiconductor Manufacturing Co., Ltd.]]

==Inventor(s)==

[[:Category:Huaixin Xian of Hsinchu (TW)|Huaixin Xian of Hsinchu (TW)]][[Category:Huaixin Xian of Hsinchu (TW)]]

[[:Category:Tzu-Ying Lin of Hsinchu (TW)|Tzu-Ying Lin of Hsinchu (TW)]][[Category:Tzu-Ying Lin of Hsinchu (TW)]]

[[:Category:Liu Han of Hsinchu (TW)|Liu Han of Hsinchu (TW)]][[Category:Liu Han of Hsinchu (TW)]]

[[:Category:Jerry Chang Jui Kao of Hsinchu (TW)|Jerry Chang Jui Kao of Hsinchu (TW)]][[Category:Jerry Chang Jui Kao of Hsinchu (TW)]]

[[:Category:Qingchao Meng of Hsinchu (TW)|Qingchao Meng of Hsinchu (TW)]][[Category:Qingchao Meng of Hsinchu (TW)]]

[[:Category:Xiangdong Chen of Hsinchu (TW)|Xiangdong Chen of Hsinchu (TW)]][[Category:Xiangdong Chen of Hsinchu (TW)]]

==BI-DIRECTIONAL SCAN FLIP-FLOP CIRCUIT AND METHOD - A simplified explanation of the abstract==


This abstract first appeared for US patent application 18152017 titled 'BI-DIRECTIONAL SCAN FLIP-FLOP CIRCUIT AND METHOD

==Simplified Explanation==

The scan flip-flop circuit described in the abstract is a circuit that includes a selection circuit, flip-flop circuit, and drivers that respond to a scan direction signal to control the output signals.

* The selection circuit has two input terminals connected to I/O nodes and responds to the scan direction signal to select signals from the input terminals.
* The flip-flop circuit is connected to the selection circuit and controls the output signal based on the selected input signal.
* The first driver is connected between the flip-flop circuit and the first I/O node, while the second driver is connected between the flip-flop circuit and the second I/O node.
* The drivers output signals based on the flip-flop circuit output signal and the selected input signal from the selection circuit.

== Potential Applications ==
The scan flip-flop circuit can be used in integrated circuits for testing and debugging purposes, where the ability to control and monitor signals is essential.

== Problems Solved ==
This technology solves the problem of efficiently testing and debugging integrated circuits by providing a circuit that can control and monitor signals during the testing process.

== Benefits ==
The benefits of this technology include improved testing efficiency, better signal control, and enhanced debugging capabilities in integrated circuits.

== Potential Commercial Applications ==
One potential commercial application of this technology is in the semiconductor industry for the production of integrated circuits with advanced testing and debugging capabilities.

== Possible Prior Art ==
Prior art in the field of scan flip-flop circuits may include similar circuits used in the design and testing of integrated circuits, as well as related patents on signal control and monitoring circuits.

=== Unanswered Questions ===

=== How does the scan flip-flop circuit improve testing efficiency in integrated circuits? ===
The scan flip-flop circuit allows for better signal control and monitoring during testing, which can help identify and debug issues more effectively.

=== What are the specific advantages of using a selection circuit in the scan flip-flop circuit? ===
The selection circuit enables the circuit to choose between different input signals, providing flexibility in controlling the output signals based on the scan direction signal.


==Original Abstract Submitted==

A scan flip-flop circuit includes a selection circuit including first and second input terminals coupled to first and second I/O nodes, a flip-flop circuit coupled to the selection circuit, a first driver coupled between the flip-flop circuit and the first I/O node, and a second driver coupled between the flip-flop circuit and the second I/O node. The selection circuit and drivers receive a scan direction signal. In response to a first logic level of the scan direction signal, the selection circuit responds to a first signal received at the first input terminal, and the second driver outputs a second signal responsive to a flip-flop circuit output signal. In response to a second logic level of the scan direction signal, the selection circuit responds to a third signal received at the second input terminal, and the first driver outputs a fourth signal responsive to the flip-flop circuit output signal.



[[Category:H03K3/037]]
[[Category:G01R31/3177]]
[[Category:G01R31/3185]]
[[Category:H03K19/00]]
[[Category:H03K19/0948]]