View source for 17830224. MODULAR CONSTRUCTION OF HYBRID-BONDED SEMICONDUCTOR DIE ASSEMBLIES AND RELATED SYSTEMS AND METHODS simplified abstract (Micron Technology, Inc.)

=MODULAR CONSTRUCTION OF HYBRID-BONDED SEMICONDUCTOR DIE ASSEMBLIES AND RELATED SYSTEMS AND METHODS=


==Organization Name==

[[:Category:Micron Technology, Inc.|Micron Technology, Inc.]]


[[Category:Micron Technology, Inc.]]

==Inventor(s)==

[[:Category:Bharat Bhushan of Taichung (TW)|Bharat Bhushan of Taichung (TW)]][[Category:Bharat Bhushan of Taichung (TW)]]

[[:Category:Akshay N. Singh of Boise ID (US)|Akshay N. Singh of Boise ID (US)]][[Category:Akshay N. Singh of Boise ID (US)]]

[[:Category:Bret K. Street of Meridian ID (US)|Bret K. Street of Meridian ID (US)]][[Category:Bret K. Street of Meridian ID (US)]]

[[:Category:Debjit Datta of Taichung (TW)|Debjit Datta of Taichung (TW)]][[Category:Debjit Datta of Taichung (TW)]]

[[:Category:Eiichi Nakano of Boise ID (US)|Eiichi Nakano of Boise ID (US)]][[Category:Eiichi Nakano of Boise ID (US)]]

==MODULAR CONSTRUCTION OF HYBRID-BONDED SEMICONDUCTOR DIE ASSEMBLIES AND RELATED SYSTEMS AND METHODS - A simplified explanation of the abstract==


This abstract first appeared for US patent application 17830224 titled 'MODULAR CONSTRUCTION OF HYBRID-BONDED SEMICONDUCTOR DIE ASSEMBLIES AND RELATED SYSTEMS AND METHODS

==Simplified Explanation==

The abstract describes a patent application for stacked semiconductor assemblies, which involve multiple modules stacked on top of each other. Each module consists of a base die and one or more upper dies, with hybrid bonds connecting the dies together. The lowermost module is also connected to a lowermost die through hybrid bonds. The sizes of the dies decrease as you move up the stack.

* Stacked semiconductor assemblies with multiple modules
* Each module consists of a base die and one or more upper dies
* Hybrid bonds are used to connect the dies within each module
* Hybrid bonds also connect the lowermost module to the lowermost die
* Sizes of the dies decrease as you move up the stack

== Potential Applications ==
* High-performance computing systems
* Data centers
* Artificial intelligence applications
* Internet of Things devices
* Mobile devices

== Problems Solved ==
* Efficient use of space in semiconductor assemblies
* Improved performance and functionality in stacked modules
* Enhanced connectivity between dies within each module

== Benefits ==
* Increased computing power and speed
* Reduced footprint and size of semiconductor assemblies
* Improved thermal management
* Enhanced scalability and flexibility in system design


==Original Abstract Submitted==

Stacked semiconductor assemblies, and related systems and methods, are disclosed herein. A representative stacked semiconductor assembly can include a lowermost die and two or more modules carried by an upper surface of the lowermost die. Each of the module(s) can include a base die and one or more upper dies and/or an uppermost die carried by the base die. Each of the dies in the module is coupled via hybrid bonds between adjacent dies. Further, the base die in a lowermost module is coupled to the lowermost die by hybrid bonds. As a result of the modular construction, the lowermost die can have a first longitudinal footprint, the base die in each of the module(s) can have a second longitudinal footprint smaller than the first longitudinal footprint, and each of the upper die(s) and/or the uppermost die can have a third longitudinal footprint smaller than the second longitudinal footprint.



[[Category:H01L23/00]]
[[Category:H01L25/065]]