SEARCH RESULTS for assignor:"BAO, TIEN-I"

Showing 1 to 14 of 14 results

Last Update Patent(s) Assignor(s) Orig. Assignee(s) Assignee(s) Reel/Frame
12-Jun-2018

(X0) 1: METHOD OF FORMING AN INTERCONNECT STRUCTURE FOR A SEMICONDUCTOR DEVICE

(A1) 2: METHOD OF FORMING AN INTERCONNECT STRUCTURE FOR A SEMICONDUCTOR DEVICE

(B2) 9: METHOD OF FORMING AN INTERCONNECT STRUCTURE FOR A SEMICONDUCTOR DEVICE

WU, YUNG-HSU

TSAI, CHENG-HSIUNG

CHANG, YU-SHENG

WU, CHIA-TIEN

LEE, CHUNG-JU

YEN, YUNG-SUNG

CHEN, CHUN-KUANG

BAO, TIEN-I

LIU, RU-GUN

SHUE, SHAU-LIN

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

39564/779

29-May-2018

(A1) 2: Finfets and Methods of Forming Finfets

(B2) 9: Finfets and Methods of Forming Finfets

(X0) 1: Finfets and Methods of Forming Finfets

(B1) 9: Finfets and Methods of Forming Finfets

LIN, CHIN-HSIANG

HUANG, TAI-CHUN

BAO, TIEN-I

TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

41539/786

10-Apr-2018

(X0) 1: POROGEN BONDED GAP FILLING MATERIAL IN SEMICONDUCTOR MANUFACTURING

(A1) 2: POROGEN BONDED GAP FILLING MATERIAL IN SEMICONDUCTOR MANUFACTURING

(B2) 9: POROGEN BONDED GAP FILLING MATERIAL IN SEMICONDUCTOR MANUFACTURING

LIN, BO-JIUN

CHANG, CHING-YU

CHEN, HAI-CHING

BAO, TIEN-I

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

36718/526

05-Apr-2018

(X0) 1: Method and Structure for Semiconductor Device Having Gate Spacer Protection Layer

(A1) 2: Method and Structure for Semiconductor Device Having Gate Spacer Protection Layer

LU, CHI WEI

LEE, CHUNG-JUG

CHEN, HAI-CHING

HUANG, CHIEN-HUA

BAO, TIEN-I

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

44313/449

05-Apr-2018

(X0) 1: Method and Structure for Semiconductor Device Having Gate Spacer Protection Layer

(A1) 2: Method and Structure for Semiconductor Device Having Gate Spacer Protection Layer

LU, CHIH WEI

LEE, CHUNG-JU

CHEN, HAI-CHING

HUANG, CHIEN-HUA

BAO, TIEN-I

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

44768/785

29-Mar-2018

(X0) 1: FinFET Cut-Last Process Using Oxide Trench Fill

(A1) 2: FinFET Cut-Last Process Using Oxide Trench Fill

HUANG, YEN-CHUN

PENG, CHIH-TANG

HSU, KUANG-YUAN

HUANG, TAI-CHUN

PERNG, TSU-HSIU

BAO, TIEN-I

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

39899/643

20-Mar-2018

(X0) 1: METHOD AND APPARATUS FOR FORMING SELF-ALIGNED VIA WITH SELECTIVELY DEPOSITED ETCHING STOP LAYER

(A1) 2: METHOD AND APPARATUS FOR FORMING SELF-ALIGNED VIA WITH SELECTIVELY DEPOSITED ETCHING STOP LAYER

(B2) 9: METHOD AND APPARATUS FOR FORMING SELF-ALIGNED VIA WITH SELECTIVELY DEPOSITED ETCHING STOP LAYER

WU, YUNG-HSU

CHEN, HAI-CHING

TSAI, JUNG-HSUN

SHUE, SHAU-LIN

BAO, TIEN-I

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

42458/816

15-Mar-2018

(X0) 1: Self-Aligned Interconnection Structure and Method

(A1) 2: Self-Aligned Interconnection Structure and Method

TSAI, JUNG-HSUN

TENG, CHI-LIN

CHEN, HAI-CHING

HUANG, HSIN-YEN

CHENG, KAI-FANG

BAO, TIEN-I

HUANG, CHIEN-HUA

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

44103/210

06-Mar-2018

(X0) 1: METHOD OF FABRICATION POLYMER WAVEGUIDE

(A1) 2: METHOD OF FABRICATION POLYMER WAVEGUIDE

(B2) 9: METHOD OF FABRICATION POLYMER WAVEGUIDE

TSENG, CHUN-HAO

LEE, WAN-YU

CHEN, HAI-CHING

BAO, TIEN-I

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

36004/226

06-Mar-2018

(X0) 1: Via Connection to a Partially Filled Trench

(A1) 2: Via Connection to a Partially Filled Trench

(B2) 9: Via Connection to a Partially Filled Trench

CHANG, SHIH-MING

LAI, CHIH-MING

LEE, CHUNG-JU

LIU, RU-GUN

SHUE, SHAU-LIN

BAO, TIEN-I

GAU, TSAI-SHENG

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

38460/328

06-Mar-2018

(X0) 1: Vertical Metal Insulator Metal Capacitor Having a High-K Dielectric Material

(A1) 2: Vertical Metal Insulator Metal Capacitor Having a High-K Dielectric Material

(B2) 9: Vertical Metal Insulator Metal Capacitor Having a High-K Dielectric Material

JOU, CHEWN-PU

BAO, TIEN-I

TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

43663/873

27-Feb-2018

(X0) 1: High Boiling Temperature Solvent Additives for Semiconductor Processing

(A1) 2: High Boiling Temperature Solvent Additives for Semiconductor Processing

(B2) 9: High Boiling Temperature Solvent Additives for Semiconductor Processing

LIN, BO-JIUN

CHANG, CHING-YU

CHEN, HAI-CHING

BAO, TIEN-I

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY

34587/410

01-Feb-2018

(X0) 1: ETCH DAMAGE AND ESL FREE DUAL DAMASCENE METAL INTERCONNECT

(A1) 2: ETCH DAMAGE AND ESL FREE DUAL DAMASCENE METAL INTERCONNECT

SINGH, SUNIL KUMAR

LEE, CHUNG-JU

BAO, TIEN-I

TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

43803/116

09-Jan-2018

(X0) 1: STRUCTURE AND FORMATION METHOD OF SEMICONDUCTOR DEVICE STRUCTURE

(A1) 2: STRUCTURE AND FORMATION METHOD OF SEMICONDUCTOR DEVICE STRUCTURE

(B2) 9: STRUCTURE AND FORMATION METHOD OF SEMICONDUCTOR DEVICE STRUCTURE

CHEN, JIAN-HUA

YANG, TAI-I

CHUANG, CHENG-CHI

WU, CHIA-TIEN

LIN, TIEN-LU

BAO, TIEN-I

TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

37946/23