SEARCH RESULTS for assignee:"UNITY SEMICONDUCTOR CORPORATION"

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(X0) 15797716: MEMORY ELEMENT WITH A REACTIVE METAL LAYER

(A1) 20180122857: MEMORY ELEMENT WITH A REACTIVE METAL LAYER

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(X0) 15706342: ACCESS SIGNAL ADJUSTMENT CIRCUITS AND METHODS FOR MEMORY CELLS IN A CROSS-POINT ARRAY

(A1) 20180096726: ACCESS SIGNAL ADJUSTMENT CIRCUITS AND METHODS FOR MEMORY CELLS IN A CROSS-POINT ARRAY

(B2) 1: ACCESS SIGNAL ADJUSTMENT CIRCUITS AND METHODS FOR MEMORY CELLS IN A CROSS-POINT ARRAY

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(X0) 15868280: CIRCUITS AND TECHNIQUES TO COMPENSATE MEMORY ACCESS SIGNALS FOR VARIATIONS OF PARAMETERS IN MULTIPLE LAYERS OF MEMORY

(A1) 20180226110: CIRCUITS AND TECHNIQUES TO COMPENSATE MEMORY ACCESS SIGNALS FOR VARIATIONS OF PARAMETERS IN MULTIPLE LAYERS OF MEMORY

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(X0) 15652148: HIGH VOLTAGE SWITCHING CIRCUITRY FOR A CROSS-POINT ARRAY

(A1) 20180005694: HIGH VOLTAGE SWITCHING CIRCUITRY FOR A CROSS-POINT ARRAY

(B2) 9: HIGH VOLTAGE SWITCHING CIRCUITRY FOR A CROSS-POINT ARRAY

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(X0) 15797452: TWO-TERMINAL REVERSIBLY SWITCHABLE MEMORY DEVICE

(A1) 20180130946: TWO-TERMINAL REVERSIBLY SWITCHABLE MEMORY DEVICE

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(X0) 15811179: MULTI-LAYERED CONDUCTIVE METAL OXIDE STRUCTURES AND METHODS FOR FACILITATING ENHANCED PERFORMANCE CHARACTERISTICS OF TWO-TERMINAL MEMORY CELLS

(A1) 20180130850: MULTI-LAYERED CONDUCTIVE METAL OXIDE STRUCTURES AND METHODS FOR FACILITATING ENHANCED PERFORMANCE CHARACTERISTICS OF TWO-TERMINAL MEMORY CELLS

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(X0) 15631130: ARRAY VOLTAGE REGULATING TECHNIQUE TO ENABLE DATA OPERATIONS ON LARGE MEMORY ARRAYS WITH RESISTIVE MEMORY ELEMENTS

(A1) 20170364296: ARRAY VOLTAGE REGULATING TECHNIQUE TO ENABLE DATA OPERATIONS ON LARGE MEMORY ARRAYS WITH RESISTIVE MEMORY ELEMENTS

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(X0) 15197482: CIRCUITS AND TECHNIQUES TO COMPENSATE MEMORY ACCESS SIGNALS FOR VARIATIONS OF PARAMETERS IN MULTIPLE LAYERS OF MEMORY

(A1) 20160379692: CIRCUITS AND TECHNIQUES TO COMPENSATE MEMORY ACCESS SIGNALS FOR VARIATIONS OF PARAMETERS IN MULTIPLE LAYERS OF MEMORY

(B2) 9: CIRCUITS AND TECHNIQUES TO COMPENSATE MEMORY ACCESS SIGNALS FOR VARIATIONS OF PARAMETERS IN MULTIPLE LAYERS OF MEMORY

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(X0) 15596499: GLOBAL BIT LINE PRE-CHARGE CIRCUIT THAT COMPENSATES FOR PROCESS, OPERATING VOLTAGE, AND TEMPERATURE VARIATIONS

(A1) 20170323681: GLOBAL BIT LINE PRE-CHARGE CIRCUIT THAT COMPENSATES FOR PROCESS, OPERATING VOLTAGE, AND TEMPERATURE VARIATIONS

(B2) 9: GLOBAL BIT LINE PRE-CHARGE CIRCUIT THAT COMPENSATES FOR PROCESS, OPERATING VOLTAGE, AND TEMPERATURE VARIATIONS