SEARCH RESULTS for assignee:"intel"

Showing 1 to 20 of 2,217 results

Last Update Patent(s) Assignor(s) Orig. Assignee(s) Assignee(s) Reel/Frame
14-Jun-2018

(X0) 1: VISUAL-SALIENCY DRIVEN SCENE DESCRIPTION

(A1) 2: VISUAL-SALIENCY DRIVEN SCENE DESCRIPTION

PARK, MI SUN

LEE, YEONGSEON

TICKOO, OMESH

INTEL CORPORATION

40596/533

14-Jun-2018

(X0) 1: SYSTEMS AND METHODS FOR GUARDBAND RECOVERY USING IN SITU CHARACTERIZATION

(A1) 2: SYSTEMS AND METHODS FOR GUARDBAND RECOVERY USING IN SITU CHARACTERIZATION

PEFFERS, SIMON N.

GULLEY, SEAN M.

DMUKAUSKAS, THOMAS L.

GORIUS, AARON

GOPAL, VINODH

INTEL CORPORATION

40694/717

14-Jun-2018

(X0) 1: OPPORTUNISTIC INCREASE OF WAYS IN MEMORY-SIDE CACHE

(A1) 2: OPPORTUNISTIC INCREASE OF WAYS IN MEMORY-SIDE CACHE

INTEL CORPORATION

40698/637

14-Jun-2018

(X0) 1: SYSTEM, APPARATUS AND METHOD FOR LOW OVERHEAD CONTROL TRANSFER TO ALTERNATE ADDRESS SPACE IN A PROCESSOR

(A1) 2: SYSTEM, APPARATUS AND METHOD FOR LOW OVERHEAD CONTROL TRANSFER TO ALTERNATE ADDRESS SPACE IN A PROCESSOR

BOSWELL, BRENT R.

NAGASUNDARAM, BANU MEENAKSHI

ABBOTT, MICHAEL D.

DAKSHINAMOORTHY, SRIKANTH

HOWARD, JASON M.

FRYMAN, JOSHUA B.

INTEL CORPORATION

40701/79

14-Jun-2018

(X0) 1: PRINTED CIRCUIT BOARD WITH A CO-PLANAR CONNECTION

(A1) 2: PRINTED CIRCUIT BOARD WITH A CO-PLANAR CONNECTION

RAJA, KANNAN G.

OAKLEY, NICHOLAS W.

INTEL CORPORATION

40703/718

14-Jun-2018

(X0) 1: COMMUNICATING SIGNALS BETWEEN DIVIDED AND UNDIVIDED CLOCK DOMAINS

(A1) 2: COMMUNICATING SIGNALS BETWEEN DIVIDED AND UNDIVIDED CLOCK DOMAINS

INTEL CORPORATION

40706/209

14-Jun-2018

(X0) 1: Accelerator for Gather-Update-Scatter Operations

(A1) 2: Accelerator for Gather-Update-Scatter Operations

VENKATESH, GANESH

MARR, DEBORAH T.

INTEL CORPORATION

40714/323

14-Jun-2018

(X0) 1: Programmable Memory Prefetcher

(A1) 2: Programmable Memory Prefetcher

VENKATESH, GANESH

WILKERSON, CHRISTOPHER B.

PUGSLEY, SETH H.

MARR, DEBORAH T.

INTEL CORPORATION

40715/885

14-Jun-2018

(X0) 1: SYSTEM, APPARATUS AND METHOD FOR DYNAMIC PROFILING IN A PROCESSOR

(A1) 2: SYSTEM, APPARATUS AND METHOD FOR DYNAMIC PROFILING IN A PROCESSOR

INTEL CORPORATION

40719/212

14-Jun-2018

(X0) 1: SYSTEM, APPARATUS AND METHOD FOR DYNAMIC PROFILING IN A PROCESSOR

(A1) 2: SYSTEM, APPARATUS AND METHOD FOR DYNAMIC PROFILING IN A PROCESSOR

INTEL CORPORATION

40719/345

14-Jun-2018

(X0) 1: APPARATUS AND METHODS TO ACHIEVE UNIFORM PACKAGE THICKNESS

(A1) 2: APPARATUS AND METHODS TO ACHIEVE UNIFORM PACKAGE THICKNESS

ZHOU, ZHENG

LI, YI

WU, TAO

SHARMA, NIKHIL

INTEL CORPORATION

40726/830

14-Jun-2018

(X0) 1: MULTI-LEVEL CACHE WITH ASSOCIATIVITY COLLISION COMPENSATION

(A1) 2: MULTI-LEVEL CACHE WITH ASSOCIATIVITY COLLISION COMPENSATION

INTEL CORPORATION

40730/450

14-Jun-2018

(X0) 1: Boot Process with Parallel Memory Initialization

(A1) 2: Boot Process with Parallel Memory Initialization

NATU, MAHESH S.

CHEN, WEI

LING, JING

MCCORMICK, JAMES E., JR.

INTEL CORPORATION

40736/899

14-Jun-2018

(X0) 1: STRESS BASED NAVIGATION ROUTING

(A1) 2: STRESS BASED NAVIGATION ROUTING

RAHAL-ARABI, TAWFIK

MACDONALD, MARK

INTEL CORPORATION

40885/453

14-Jun-2018

(X0) 1: OPTICAL MICRO MIRROR ARRAYS

(A1) 2: OPTICAL MICRO MIRROR ARRAYS

GROVER, GINNI

OSTER, SASHA N.

EID, FERAS

HUNTER, SETH E.

INTEL CORPORATION

40887/178

14-Jun-2018

(X0) 1: THERMOPLASTIC ELASTOMER (TPE) ADHESIVE CARRIER TAPE

(A1) 2: THERMOPLASTIC ELASTOMER (TPE) ADHESIVE CARRIER TAPE

DAI, MINGZHI

YIN, WEN

DUNNING, CRAIG S.

CALLAN, ROBERT D.

INTEL CORPORATION

40887/272

14-Jun-2018

(X0) 1: HIGH PERFORMANCE RECEIVER WITH SINGLE CALIBRATION VOLTAGE

(A1) 2: HIGH PERFORMANCE RECEIVER WITH SINGLE CALIBRATION VOLTAGE

LI, SHENGGAO

CHEN, JI

INTEL CORPORATION

40938/559

14-Jun-2018

(X0) 1: SYSTEM AND METHOD FOR PERFORMING PARTIAL CACHE LINE WRITES WITHOUT FILL-READS OR BYTE ENABLES

(A1) 2: SYSTEM AND METHOD FOR PERFORMING PARTIAL CACHE LINE WRITES WITHOUT FILL-READS OR BYTE ENABLES

HASHEMI, HASHEM

SHARMA, SAURABH

KOKER, ALTUG

INTEL CORPORATION

40958/437

14-Jun-2018

(X0) 1: METHODS AND SYSTEMS FOR INVALIDATING MEMORY RANGES IN FABRIC-BASED ARCHITECTURES

(A1) 2: METHODS AND SYSTEMS FOR INVALIDATING MEMORY RANGES IN FABRIC-BASED ARCHITECTURES

KUMAR, KARTHIK

WILLHALM, THOMAS

GUIM BERNAT, FRANCESC

SLECHTA, BRIAN J.

INTEL CORPORATION

41020/959

14-Jun-2018

(X0) 1: OFFLOAD COMPUTING PROTOCOL

(A1) 2: OFFLOAD COMPUTING PROTOCOL

O'HARE, FEARGHAL

NOLAN, MICHAEL

O'NEILL, JAMES A.

INTEL CORPORATION

41035/465