SEARCH RESULTS for assignee:"cavium"

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(A1) 20190227805: ISSUING INSTRUCTIONS BASED ON RESOURCE CONFLICT CONSTRAINTS IN MICROPORCESSOR

(X0) 15875611: ISSUING INSTRUCTIONS BASED ON RESOURCE CONFLICT CONSTRAINTS IN MICROPORCESSOR

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(X0) 16272470: Method and Apparatus for A Vector Memory Subsystem for Use with A Programmable Mixed-Radix DFT/IDFT Processor

(A1) 20190171613: Method and Apparatus for A Vector Memory Subsystem for Use with A Programmable Mixed-Radix DFT/IDFT Processor

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(X0) 14150635: METHODS AND SYSTEMS FOR DISTRIBUTION OF PACKETS AMONG PARSING CLUSTERS

(A1) 20150195385: METHODS AND SYSTEMS FOR DISTRIBUTION OF PACKETS AMONG PARSING CLUSTERS

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(B2) 10284690: METHODS AND SYSTEMS FOR DISTRIBUTION OF PACKETS AMONG PARSING CLUSTERS

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(X0) 15292015: METHODS AND APPARATUS FOR A VECTOR MEMORY SUBSYSTEM FOR USE WITH A PROGRAMMABLE MIXED-RADIX DFT/IDFT PROCESSOR

(A1) 20170192935: METHODS AND APPARATUS FOR A VECTOR MEMORY SUBSYSTEM FOR USE WITH A PROGRAMMABLE MIXED-RADIX DFT/IDFT PROCESSOR

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(X0) 15796645: Self-Biased Current Trimmer With Digital Scaling Input

(A1) 20190129460: Self-Biased Current Trimmer With Digital Scaling Input

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(X0) 13565271: System and Method for Storing Lookup Request Rules in Multiple Memories

(A1) 20130036083: System and Method for Storing Lookup Request Rules in Multiple Memories

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(B2) 10277510: System and Method for Storing Lookup Request Rules in Multiple Memories

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(X0) 15789420: MULTI-TERMINATION SCHEME INTERFACE

(A1) 20190123746: MULTI-TERMINATION SCHEME INTERFACE

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(X0) 15721334: Serializer/Deserializer (SerDes) Lanes with Lane-by-Lane Datarate Independence

(A1) 20190103956: Serializer/Deserializer (SerDes) Lanes with Lane-by-Lane Datarate Independence

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(X0) 15719973: BASELINE WANDER COMPENSATION

(A1) 20190103875: BASELINE WANDER COMPENSATION

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(X0) 15693020: Method and Apparatus for Coordinated Multipoint Receiver Processing Acceleration and Latency Reduction

(A1) 20190021013: Method and Apparatus for Coordinated Multipoint Receiver Processing Acceleration and Latency Reduction

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(X0) 15631085: MANAGING CACHE PARTITIONS BASED ON CACHE USAGE INFORMATION

(A1) 20180373635: MANAGING CACHE PARTITIONS BASED ON CACHE USAGE INFORMATION

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(X0) 15608852: FLOWLET SCHEDULER FOR MULTICORE NETWORK PROCESSORS

(A1) 20180351692: FLOWLET SCHEDULER FOR MULTICORE NETWORK PROCESSORS

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(X0) 15594497: Methods And Apparatus For A Unified Baseband Architecture

(A1) 20180352557: Methods And Apparatus For A Unified Baseband Architecture

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(X0) 15613889: PROGRAMMABLE HARDWARE SCHEDULER FOR DIGITAL PROCESSING SYSTEMS

(A1) 20180349185: PROGRAMMABLE HARDWARE SCHEDULER FOR DIGITAL PROCESSING SYSTEMS

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(X0) 15613760: METHOD AND APPARATUS FOR SCHEDULING ARBITRATION AMONG A PLURALITY OF SERVICE REQUESTORS

(A1) 20180349180: METHOD AND APPARATUS FOR SCHEDULING ARBITRATION AMONG A PLURALITY OF SERVICE REQUESTORS

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(X0) 15269072: MANAGING MEMORY ACCESS REQUESTS WITH PREFETCH FOR STREAMS

(A1) 20170322885: MANAGING MEMORY ACCESS REQUESTS WITH PREFETCH FOR STREAMS

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(B2) 10013357: MANAGING MEMORY ACCESS REQUESTS WITH PREFETCH FOR STREAMS

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(X0) 15592087: Methods and Apparatus for Frequency Offset Estimation

(A1) 20170331664: Methods and Apparatus for Frequency Offset Estimation

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(X0) 15602620: RE-ORDERING BUFFER FOR A DIGITAL MULTI-PROCESSOR SYSTEM WITH CONFIGURABLE, SCALABLE, DISTRIBUTED JOB MANAGER

(A1) 20180341602: RE-ORDERING BUFFER FOR A DIGITAL MULTI-PROCESSOR SYSTEM WITH CONFIGURABLE, SCALABLE, DISTRIBUTED JOB MANAGER

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(X0) 15595667: Methods and Apparatus for Adaptive Power Profiling in a Baseband Processing System

(A1) 20180329472: Methods and Apparatus for Adaptive Power Profiling in a Baseband Processing System

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