Qualcomm incorporated (20240319268). BUILT-IN SELF-TEST ENHANCEMENTS simplified abstract
Contents
BUILT-IN SELF-TEST ENHANCEMENTS
Organization Name
Inventor(s)
Saksham Tandon of Bangalore (IN)
BUILT-IN SELF-TEST ENHANCEMENTS - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240319268 titled 'BUILT-IN SELF-TEST ENHANCEMENTS
The abstract of this patent application describes a method that involves obtaining built-in self-test (BIST) patterns, compressing these patterns using a compression scheme, and storing the compressed BIST patterns.
- The method includes obtaining one or more BIST patterns, each containing a series of instructions.
- A compression scheme is applied to generate compressed BIST patterns, encoding the operation and data field of instructions to create encoded instructions.
- Each encoded instruction has an identifier (ID) field and a variable number of data bytes, with the ID field indicating the type of operation and the number of data bytes.
- The compressed BIST patterns are then stored for future use.
Potential Applications: This technology can be applied in the semiconductor industry for testing integrated circuits and ensuring their functionality.
Problems Solved: This method addresses the need for efficient storage and transmission of BIST patterns in electronic devices.
Benefits: - Improved efficiency in storing and using BIST patterns - Enhanced testing capabilities for integrated circuits - Reduced storage requirements for BIST patterns
Commercial Applications: This technology can be utilized by semiconductor companies, electronics manufacturers, and testing laboratories to enhance the quality and reliability of their products.
Questions about the technology: 1. How does the compression scheme used in this method improve the storage and transmission of BIST patterns? 2. What are the potential challenges in implementing this technology in different types of integrated circuits?
Original Abstract Submitted
aspects of the present disclosure provide a method generally including obtaining one or more built-in self-test (bist) patterns, each pattern including a series of instructions, applying a compression scheme to generate one or more compressed bist patterns, wherein the compression scheme encodes an operation and data field of instructions to generate encoded instructions, each encoded instruction having an identifier (id) field and a variable number of data bytes, wherein the id field identifies a type of the operation and indicates the variable number of data bytes, and storing the compressed bist patterns.
