RESISTIVE MEMORY CELL, RESISTIVE MEMORY ARRAY INCLUDING THE RESISTIVE MEMORY CELL AND METHOD OF MANUFACTURING THE RESISTIVE MEMORY CELL

Abstract: a resistive memory cell may include a lower electrode, an upper electrode, a variable resistance layer and a charge bypass layer. the upper electrode may be substantially perpendicular to the lower electrode. the variable resistance layer may be interposed between the lower electrode and the upper electrode. the variable resistance layer may have a resistance changed by a conductive filament, which may include a reversibly generated oxygen vacancy, based on an electric field between the lower electrode and the upper electrode. when a voltage, which may be higher than a program voltage applied to the upper electrode, may be applied to the lower electrode, the charge bypass layer may include a plurality of discontinuous vertical grain boundaries and a plurality of horizontal grain boundaries connected between the discontinuous vertical grain boundaries.

Inventor(s): Won Tae KOO, Young Jae KWON

CPC Classification: H10N70/882 ()

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