18150410. BACK END FLOATING GATE STRUCTURE IN A SEMICONDUCTOR DEVICE simplified abstract (Taiwan Semiconductor Manufacturing Company, Ltd.)
BACK END FLOATING GATE STRUCTURE IN A SEMICONDUCTOR DEVICE
Organization Name
Taiwan Semiconductor Manufacturing Company, Ltd.
Inventor(s)
Yun-Feng Kao of New Taipei City (TW)
Katherine H. Chiang of New Taipei City (TW)
Chia Yu Ling of Hsinchu City (TW)
BACK END FLOATING GATE STRUCTURE IN A SEMICONDUCTOR DEVICE - A simplified explanation of the abstract
This abstract first appeared for US patent application 18150410 titled 'BACK END FLOATING GATE STRUCTURE IN A SEMICONDUCTOR DEVICE
Simplified Explanation
The semiconductor device described in the patent application includes a non-volatile memory cell structure in the back end region of the device, allowing for selective storage of charge even when power is removed.
- Non-volatile memory cell structure formed in the back end region of the semiconductor device
- Floating gate structure with dielectric layer between gate structure and word line conductive structure
- Enables selective storage of charge on the gate structure
- Allows for caching and long-term storage in the back end region of the semiconductor device
Potential Applications
- Data storage devices
- Embedded systems
- Smartphones and tablets
Problems Solved
- Efficient data storage
- Reliable long-term storage
- Reduced power consumption
Benefits
- Selective charge storage
- Improved data retention
- Enhanced device performance
Original Abstract Submitted
A semiconductor device may include a non-volatile memory cell structure that may be formed in a back end region of a semiconductor device. The non-volatile memory cell structure may include a floating gate structure in which a portion of a dielectric layer is included between a gate structure and a word line conductive structure. The separation of the gate structure and the word line conductive structure by the dielectric layer results in the gate structure being a floating gate structure. This enables a charge to be selectively stored on the gate structure, even when power is removed from the word line conductive structure. The non-volatile memory cell structure along with a volatile memory cell structure are provided in the back end region of the semiconductor device, such that caching and long-term storage may be performed in the back end region of the semiconductor device.