18078984. TECHNIQUES TO ALLOCATE MEMORY FOR IN-LINE OR IN-BAND ERROR CORRECTION CONTROL simplified abstract (Intel Corporation)
Contents
TECHNIQUES TO ALLOCATE MEMORY FOR IN-LINE OR IN-BAND ERROR CORRECTION CONTROL
Organization Name
Inventor(s)
Vaibhav Shankar of Seattle WA (US)
Amir Ali Radjai of Portland OR (US)
Jaishankar Rajendran of Bangalore (IN)
Evrim Binboga of Pleasanton CA (US)
Prashant Kodali of Portland OR (US)
TECHNIQUES TO ALLOCATE MEMORY FOR IN-LINE OR IN-BAND ERROR CORRECTION CONTROL - A simplified explanation of the abstract
This abstract first appeared for US patent application 18078984 titled 'TECHNIQUES TO ALLOCATE MEMORY FOR IN-LINE OR IN-BAND ERROR CORRECTION CONTROL
Simplified Explanation: The patent application discusses techniques for allocating memory capacity within a memory partition, dividing it into regions for different types of memory.
- The memory partition includes a first region with in-line or in-band error correction control (IBECC) memory and a second region with non-IBECC memory.
- The size of the first and second regions can be adjusted based on their usage reaching a certain threshold.
Key Features and Innovation:
- Memory partitioning with separate regions for IBECC and non-IBECC memory.
- Dynamic resizing of regions based on usage thresholds.
Potential Applications: This technology can be applied in various memory-intensive systems such as servers, data centers, and high-performance computing devices.
Problems Solved:
- Efficient allocation of memory resources.
- Improved error correction capabilities.
Benefits:
- Enhanced memory management.
- Increased reliability and performance.
Commercial Applications: Potential commercial applications include server hardware, data storage solutions, and cloud computing services.
Prior Art: Readers can explore prior research on memory partitioning, error correction techniques, and memory management systems.
Frequently Updated Research: Stay informed about the latest developments in memory allocation, error correction, and memory partitioning technologies.
Questions about Memory Partitioning: 1. How does memory partitioning impact system performance? 2. What are the key considerations when implementing memory partitioning in a system?
Original Abstract Submitted
Examples include techniques associated with allocating memory capacity of a memory partitioned to include a first region arranged to include in-line or in-band error correction control (IBECC) memory and a second region arranged to include non-IBECC memory. The first and second regions can be re-sized based on usage of either region reaching a threshold.
