17885577. SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF simplified abstract (TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.)

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

Organization Name

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor(s)

Chia-Hung Chu of Taipei City (TW)

Shuen-Shin Liang of Hsinchu County (TW)

Chung-Liang Cheng of Changhua County (TW)

Sung-Li Wang of Hsinchu County (TW)

Chien Chang of Hsinchu (TW)

Harry Chien of Chandler AZ (US)

Lin-Yu Huang of Hsinchu (TW)

Min-Hsuan Lu of Hsinchu City (TW)

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - A simplified explanation of the abstract

This abstract first appeared for US patent application 17885577 titled 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

Simplified Explanation

The semiconductor device described in the abstract includes parallel channel members, a gate structure, source/drain features, a silicide layer, and a source/drain contact.

• The parallel channel members are spaced apart from one another.
• The gate structure wraps around the channel members.
• The source/drain features are located beside the channel members and on opposite sides of the gate structure.
• The silicide layer is in direct contact with the source/drain features.
• The source/drain contact includes a first and second source/drain contact stacked on top of each other, with the second contact separate from the silicide layer by the first contact.

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1. 1. 1. Potential Applications

• Semiconductor industry for integrated circuits and electronic devices.

1. 1. 1. Problems Solved

• Improved performance and efficiency of semiconductor devices.
• Enhanced contact between source/drain features and silicide layer.

1. 1. 1. Benefits

• Higher conductivity and lower resistance in the semiconductor device.
• Better overall performance and reliability of electronic devices utilizing this technology.

Original Abstract Submitted

A semiconductor device includes parallel channel members, a gate structure, source/drain features, a silicide layer, and a source/drain contact. The parallel channel members are spaced apart from one another. The gate structure is wrapping around the channel members. The source/drain features are disposed besides the channel members and at opposite sides of the gate structure. The silicide layer is disposed on and in direct contact with the source/drain features. The source/drain contact is disposed on the silicide layer, wherein the source/drain contact includes a first source/drain contact and a second source/drain contact stacked on the first source/drain contact, and the second source/drain contact is separate from the silicide layer by the first source/drain contact.