Difference between revisions of "International Business Machines Corporation patent applications published on November 30th, 2023"
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+ | '''Summary of the patent applications from International Business Machines Corporation on November 30th, 2023''' | ||
+ | |||
+ | Recently, International Business Machines Corporation (IBM) has filed several patents related to various technologies. These patents cover a range of areas including memory devices, electromagnetic compatibility (EMC) protection apparatus, device identification, access policy optimization, semiconductor devices, CMOS devices, microelectronic structures, contact and gate regions, and language learning through content translation. | ||
+ | |||
+ | In the field of memory devices, IBM has filed a patent for a memory device that includes a magnetic tunnel junction pillar and a sidewall spacer. This design aims to improve the performance and functionality of the memory device. | ||
+ | |||
+ | For EMC protection apparatus, IBM has filed a patent for a system and method to control the apparatus in a removable component inserted into an end product. The system detects a power good signal and rotates the EMC protection device to create an EMC seal. | ||
+ | |||
+ | In the area of device identification, IBM has filed a patent for a method to display identification information for devices connected to multiple ports. The method involves establishing communication between the device and the port and displaying the identification information on a display associated with the port. | ||
+ | |||
+ | IBM has also filed a patent for a system and method to analyze and optimize access policies. The system computes an access control health metric to measure the current state of access policies and identifies subgroups of policies for optimization. | ||
+ | |||
+ | In the field of semiconductor devices, IBM has filed a patent for a device design that includes a buried power rail, buried oxide layer, channel fins, bottom epitaxial layer, gate stack, and top epitaxial layer. This design aims to improve electrical connectivity and performance. | ||
+ | |||
+ | IBM has also filed a patent for a CMOS device with a pFET epi and an nFET epi, each having specific dielectric layers and trench structures. | ||
+ | |||
+ | In the area of microelectronic structures, IBM has filed a patent for a structure with stacked device regions, gate cut regions, and interconnects connecting different devices within the stacked region. | ||
+ | |||
+ | IBM has also filed a patent for a microelectronics device with a specific design for the contact and gate regions, including tapered sidewalls. | ||
+ | |||
+ | Lastly, IBM has filed a patent for a magnetic tape head, magnetic tape drive, and computational device, although further details are not provided in the abstract. | ||
+ | |||
+ | Notable applications: | ||
+ | * Memory device with magnetic tunnel junction pillar and sidewall spacer. | ||
+ | * System and method for controlling EMC protection apparatus in a removable component. | ||
+ | * Method for displaying identification information for devices connected to multiple ports. | ||
+ | * System and method for analyzing and optimizing access policies. | ||
+ | * Semiconductor device with buried power rail, buried oxide layer, and gate stack. | ||
+ | * CMOS device with specific dielectric layers and trench structures. | ||
+ | * Microelectronic structure with stacked device regions and interconnects. | ||
+ | * Microelectronics device with specific design for contact and gate regions. | ||
+ | * Magnetic tape head, magnetic tape drive, and computational device. | ||
+ | |||
+ | |||
+ | |||
+ | |||
==Patent applications for International Business Machines Corporation on November 30th, 2023== | ==Patent applications for International Business Machines Corporation on November 30th, 2023== | ||
Revision as of 04:37, 5 December 2023
Summary of the patent applications from International Business Machines Corporation on November 30th, 2023
Recently, International Business Machines Corporation (IBM) has filed several patents related to various technologies. These patents cover a range of areas including memory devices, electromagnetic compatibility (EMC) protection apparatus, device identification, access policy optimization, semiconductor devices, CMOS devices, microelectronic structures, contact and gate regions, and language learning through content translation.
In the field of memory devices, IBM has filed a patent for a memory device that includes a magnetic tunnel junction pillar and a sidewall spacer. This design aims to improve the performance and functionality of the memory device.
For EMC protection apparatus, IBM has filed a patent for a system and method to control the apparatus in a removable component inserted into an end product. The system detects a power good signal and rotates the EMC protection device to create an EMC seal.
In the area of device identification, IBM has filed a patent for a method to display identification information for devices connected to multiple ports. The method involves establishing communication between the device and the port and displaying the identification information on a display associated with the port.
IBM has also filed a patent for a system and method to analyze and optimize access policies. The system computes an access control health metric to measure the current state of access policies and identifies subgroups of policies for optimization.
In the field of semiconductor devices, IBM has filed a patent for a device design that includes a buried power rail, buried oxide layer, channel fins, bottom epitaxial layer, gate stack, and top epitaxial layer. This design aims to improve electrical connectivity and performance.
IBM has also filed a patent for a CMOS device with a pFET epi and an nFET epi, each having specific dielectric layers and trench structures.
In the area of microelectronic structures, IBM has filed a patent for a structure with stacked device regions, gate cut regions, and interconnects connecting different devices within the stacked region.
IBM has also filed a patent for a microelectronics device with a specific design for the contact and gate regions, including tapered sidewalls.
Lastly, IBM has filed a patent for a magnetic tape head, magnetic tape drive, and computational device, although further details are not provided in the abstract.
Notable applications:
- Memory device with magnetic tunnel junction pillar and sidewall spacer.
- System and method for controlling EMC protection apparatus in a removable component.
- Method for displaying identification information for devices connected to multiple ports.
- System and method for analyzing and optimizing access policies.
- Semiconductor device with buried power rail, buried oxide layer, and gate stack.
- CMOS device with specific dielectric layers and trench structures.
- Microelectronic structure with stacked device regions and interconnects.
- Microelectronics device with specific design for contact and gate regions.
- Magnetic tape head, magnetic tape drive, and computational device.
Contents
- 1 Patent applications for International Business Machines Corporation on November 30th, 2023
- 1.1 FILTER DEVICE HAVING MULTIPLE CHANGEABLE FILTER SURFACES (17664925)
- 1.2 VISUAL LIGHT-BASED DIRECTION TO ROBOTIC SYSTEM (17664734)
- 1.3 PATH DISCOVERY IN AN UNKNOWN ENCLOSED SURROUNDING BASED ON DIRECTION OF LIGHT AND AIR MOVEMENT (17804101)
- 1.4 RANKING A USER'S PREFERENCE MODEL IN A VIRTUAL REALITY ENVIRONMENT (17804604)
- 1.5 ZOOM ACTION BASED IMAGE PRESENTATION (17664710)
- 1.6 INFERRING THE STATE OF A WRITE-ONLY DEVICE (18363102)
- 1.7 BINARY TRANSLATION USING RAW BINARY CODE WITH COMPILER PRODUCED METADATA (17664969)
- 1.8 COMPATIBLE AND SECURE SOFTWARE UPGRADES (17804322)
- 1.9 CACHE MANAGEMENT USING CACHE SCOPE DESIGNATION (17664722)
- 1.10 ELECTRONIC COMMUNICATION BETWEEN DEVICES USING A PROTOCOL (17664806)
- 1.11 FULL ALLOCATION VOLUME TO DEDUPLICATION VOLUME MIGRATION IN A STORAGE SYSTEM (17804109)
- 1.12 DATA QUALITY ANALYZE EXECUTION IN DATA GOVERNANCE (17824200)
- 1.13 MANAGING LOCATIONS OF DERIVED STORAGE OBJECTS (17664880)
- 1.14 IDENTIFYING AND PROCESSING POLY-PROCESS NATURAL LANGUAGE QUERIES (17804116)
- 1.15 LOGIC LOCKING OPERATIONS (17664861)
- 1.16 ENHANCED ALIGNMENT FOR GLOBAL PLACEMENT IN A CIRCUIT (17804070)
- 1.17 DETECTING PEER PRESSURE USING MEDIA CONTENT INTERACTIONS (17804232)
- 1.18 PARALLEL AND DISTRIBUTED PROCESSING OF PROPOSITIONAL LOGICAL NEURAL NETWORKS (17804107)
- 1.19 NEUROMORPHIC CHIP FOR UPDATING PRECISE SYNAPTIC WEIGHT VALUES (18366348)
- 1.20 METHOD AND SYSTEM OF GENERATING A CLASSICAL MODEL TO SIMULATE A QUANTUM COMPUTATIONAL MODEL VIA INPUT PERTURBATION TO ENHANCE EXPLAINABILITY (17825614)
- 1.21 DATA SELECTION FOR MACHINE LEARNING MODELS BASED ON DATA PROFILING (17804218)
- 1.22 GRAPH ENCODERS FOR BUSINESS PROCESS ANOMALY DETECTION (17664719)
- 1.23 PREDICTIVE SERVICE ORCHESTRATION USING THREAT MODELING ANALYTICS (17664718)
- 1.24 Lesion Detection and Segmentation (17752506)
- 1.25 REGIONAL-TO-LOCAL ATTENTION FOR VISION TRANSFORMERS (17804724)
- 1.26 AUTOMATED HAZARD RECOGNITION USING MULTIPARAMETER ANALYSIS OF AERIAL IMAGERY (17825483)
- 1.27 LANGUAGE LEARNING THROUGH CONTENT TRANSLATION (17804642)
- 1.28 MECHANISM TO SHIFT THE HEAD SPAN OF A TAPE HEAD AT A WAFER LEVEL (18358684)
- 1.29 ANGLED CONTACT WITH A NEGATIVE TAPERED PROFILE (17664671)
- 1.30 INTERCONNECT THROUGH GATE CUT FOR STACKED FET DEVICE (17664887)
- 1.31 METHOD AND STRUCTURE FOR FORMING LOW CONTACT RESISTANCE COMPLEMENTARY METAL OXIDE SEMICONDUCTOR (17664712)
- 1.32 VTFET WITH BURIED POWER RAILS (18232510)
- 1.33 OPTIMIZATION FOR ACCESS POLICIES IN COMPUTER SYSTEMS (17826942)
- 1.34 ELECTRICAL PORT LABELING (17664947)
- 1.35 MOTOR CONTROLLED RETRACTABLE EMC PROTECTION (18449096)
- 1.36 MAGNETO-RESISTIVE RANDOM ACCESS MEMORY WITH HEMISPHERICAL TOP ELECTRODE (17804795)
Patent applications for International Business Machines Corporation on November 30th, 2023
FILTER DEVICE HAVING MULTIPLE CHANGEABLE FILTER SURFACES (17664925)
Main Inventor
Madhana Sunder
VISUAL LIGHT-BASED DIRECTION TO ROBOTIC SYSTEM (17664734)
Main Inventor
Shailendra Moyal
PATH DISCOVERY IN AN UNKNOWN ENCLOSED SURROUNDING BASED ON DIRECTION OF LIGHT AND AIR MOVEMENT (17804101)
Main Inventor
Atul Mene
RANKING A USER'S PREFERENCE MODEL IN A VIRTUAL REALITY ENVIRONMENT (17804604)
Main Inventor
Jill Burns
ZOOM ACTION BASED IMAGE PRESENTATION (17664710)
Main Inventor
Tushar Agrawal
INFERRING THE STATE OF A WRITE-ONLY DEVICE (18363102)
Main Inventor
Jarrett Betke
BINARY TRANSLATION USING RAW BINARY CODE WITH COMPILER PRODUCED METADATA (17664969)
Main Inventor
Toshihiko Koju
COMPATIBLE AND SECURE SOFTWARE UPGRADES (17804322)
Main Inventor
Jun Wang
CACHE MANAGEMENT USING CACHE SCOPE DESIGNATION (17664722)
Main Inventor
Taylor J. Pritchard
ELECTRONIC COMMUNICATION BETWEEN DEVICES USING A PROTOCOL (17664806)
Main Inventor
Timothy Andrew Moran
FULL ALLOCATION VOLUME TO DEDUPLICATION VOLUME MIGRATION IN A STORAGE SYSTEM (17804109)
Main Inventor
Dominic Tomkins
DATA QUALITY ANALYZE EXECUTION IN DATA GOVERNANCE (17824200)
Main Inventor
Xu Bin Cai
MANAGING LOCATIONS OF DERIVED STORAGE OBJECTS (17664880)
Main Inventor
Ben Sasson
IDENTIFYING AND PROCESSING POLY-PROCESS NATURAL LANGUAGE QUERIES (17804116)
Main Inventor
YAZAN OBEIDI
LOGIC LOCKING OPERATIONS (17664861)
Main Inventor
Jinwook JUNG
ENHANCED ALIGNMENT FOR GLOBAL PLACEMENT IN A CIRCUIT (17804070)
Main Inventor
Alexey Y LVOV
DETECTING PEER PRESSURE USING MEDIA CONTENT INTERACTIONS (17804232)
Main Inventor
Yuriko Nishikawa
PARALLEL AND DISTRIBUTED PROCESSING OF PROPOSITIONAL LOGICAL NEURAL NETWORKS (17804107)
Main Inventor
Venkatesan Thirumalai Chakaravarthy
NEUROMORPHIC CHIP FOR UPDATING PRECISE SYNAPTIC WEIGHT VALUES (18366348)
Main Inventor
Atsuya Okazaki
METHOD AND SYSTEM OF GENERATING A CLASSICAL MODEL TO SIMULATE A QUANTUM COMPUTATIONAL MODEL VIA INPUT PERTURBATION TO ENHANCE EXPLAINABILITY (17825614)
Main Inventor
Vladimir Rastunkov
DATA SELECTION FOR MACHINE LEARNING MODELS BASED ON DATA PROFILING (17804218)
Main Inventor
Paulina Toro Isaza
GRAPH ENCODERS FOR BUSINESS PROCESS ANOMALY DETECTION (17664719)
Main Inventor
Siyu Huo
PREDICTIVE SERVICE ORCHESTRATION USING THREAT MODELING ANALYTICS (17664718)
Main Inventor
ASMAHAN ALI
Lesion Detection and Segmentation (17752506)
Main Inventor
Wen Wei
REGIONAL-TO-LOCAL ATTENTION FOR VISION TRANSFORMERS (17804724)
Main Inventor
Richard CHEN
AUTOMATED HAZARD RECOGNITION USING MULTIPARAMETER ANALYSIS OF AERIAL IMAGERY (17825483)
Main Inventor
Levente Klein
LANGUAGE LEARNING THROUGH CONTENT TRANSLATION (17804642)
Main Inventor
Vinicius Maidana Alves
MECHANISM TO SHIFT THE HEAD SPAN OF A TAPE HEAD AT A WAFER LEVEL (18358684)
Main Inventor
Icko E.T. Iben
ANGLED CONTACT WITH A NEGATIVE TAPERED PROFILE (17664671)
Main Inventor
Oleg Gluschenkov
INTERCONNECT THROUGH GATE CUT FOR STACKED FET DEVICE (17664887)
Main Inventor
Ruilong Xie
METHOD AND STRUCTURE FOR FORMING LOW CONTACT RESISTANCE COMPLEMENTARY METAL OXIDE SEMICONDUCTOR (17664712)
Main Inventor
Ruilong Xie
VTFET WITH BURIED POWER RAILS (18232510)
Main Inventor
Chen Zhang
OPTIMIZATION FOR ACCESS POLICIES IN COMPUTER SYSTEMS (17826942)
Main Inventor
Shawn Patrick Authement
ELECTRICAL PORT LABELING (17664947)
Main Inventor
Bryan Edward Truong
MOTOR CONTROLLED RETRACTABLE EMC PROTECTION (18449096)
Main Inventor
John S. Werner
MAGNETO-RESISTIVE RANDOM ACCESS MEMORY WITH HEMISPHERICAL TOP ELECTRODE (17804795)
Main Inventor
Oscar van der Straten