View source for US Patent Application 17750819. TECHNIQUES FOR HEAT DISPERSION IN 3D INTEGRATED CIRCUIT simplified abstract

=TECHNIQUES FOR HEAT DISPERSION IN 3D INTEGRATED CIRCUIT=


==Organization Name==

[[:Category:TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.|TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.]]


[[Category:TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.]]

==Inventor(s)==

[[:Category:Chien Ta Huang of Taoyuan City (TW)|Chien Ta Huang of Taoyuan City (TW)]][[Category:Chien Ta Huang of Taoyuan City (TW)]]

[[:Category:Chun-Yang Tsai of Hsinchu City (TW)|Chun-Yang Tsai of Hsinchu City (TW)]][[Category:Chun-Yang Tsai of Hsinchu City (TW)]]

[[:Category:Yi Ching Ong of Hsinchu (TW)|Yi Ching Ong of Hsinchu (TW)]][[Category:Yi Ching Ong of Hsinchu (TW)]]

[[:Category:Kuo-Ching Huang of Hsinchu City (TW)|Kuo-Ching Huang of Hsinchu City (TW)]][[Category:Kuo-Ching Huang of Hsinchu City (TW)]]

[[:Category:Harry-Hak-Lay Chuang of Zhubei City (TW)|Harry-Hak-Lay Chuang of Zhubei City (TW)]][[Category:Harry-Hak-Lay Chuang of Zhubei City (TW)]]

==TECHNIQUES FOR HEAT DISPERSION IN 3D INTEGRATED CIRCUIT - A simplified explanation of the abstract==


This abstract first appeared for US patent application 17750819 titled 'TECHNIQUES FOR HEAT DISPERSION IN 3D INTEGRATED CIRCUIT

==Simplified Explanation==

The patent application describes a structure for improving heat dissipation in a semiconductor device. Here are the key points:

* The structure consists of two dies bonded together, with interconnect structures arranged between them.
* A redistribution layer (RDL) stack is placed on the outer side of the first die.
* A heat path is created using a through substrate via (TSV) that extends from a conductive layer in the first interconnect structure, through the first substrate, and into the RDL stack.
* The RDL stack includes an RDL dielectric material that separates the heat path from the surrounding environment.
* The thermal conductivity of the RDL dielectric material is significantly higher (over twenty times) than the thermal conductivity of the interconnect dielectric material used in the interconnect structures of both dies.


==Original Abstract Submitted==

A first die includes a first substrate and a first interconnect structure. A second die is bonded to the first die and includes a second substrate and a second interconnect structure, such that the first and second interconnect structures are arranged between the first and second substrates. A redistribution layer (RDL) stack is arranged on an outer side of the first die opposite the first interconnect structure. A heat path includes a through substrate via (TSV) extending from a conductive layer in the first interconnect structure, through the first substrate, and into the RDL stack. An RDL dielectric material is included in the RDL stack and separates the heat path from an ambient environment. A thermal conductivity of the RDL dielectric is over twenty times a thermal conductivity of an interconnect dielectric material of the first interconnect structure or of the second interconnect structure.



[[Category:H01L23/367]]
[[Category:H01L23/373]]
[[Category:H01L23/528]]