BUILT-IN SELF-TEST CIRCUIT AND SYSTEM ON CHIP INCLUDING THE SAME

Abstract: a system-on-chip (soc) includes a monitoring circuit configured to determine whether a monitoring voltage has a value between a first reference voltage and a second reference voltage using a first supply voltage and a second supply voltage, and a built-in self-test (bist) circuit configured to, in response to an enable signal, determine whether the monitoring circuit is operating normally. the bist circuit may include a first test circuit configured to determine whether the first supply voltage has a value within a predetermined first supply range using the second supply voltage, a second test circuit configured to determine whether the first reference voltage has a value within a predetermined first reference range, and a third test circuit configured to determine whether the monitoring circuit compares a magnitude of the monitoring voltage with a magnitude of a first determination voltage having a value within a predetermined first comparison range from the first reference voltage.

Inventor(s): Seki Kim, Hyunseok Nam, Takahiro Nomiyama

CPC Classification: G01R31/2884 (Testing of electronic circuits, e.g. by signal tracer ({EMC, EMP or similar testing of electronic circuits ;} testing for short-circuits, discontinuities, leakage or incorrect line connection ; checking computers {or computer components} ; checking static stores for correct operation {; testing receivers or transmitters of transmission systems }))

Search for rejections for patent application number 20250216446