US Patent Application 18365995. NANO TRANSISTORS WITH SOURCE/DRAIN HAVING SIDE CONTACTS TO 2-D MATERIAL simplified abstract
Contents
NANO TRANSISTORS WITH SOURCE/DRAIN HAVING SIDE CONTACTS TO 2-D MATERIAL
Organization Name
Taiwan Semiconductor Manufacturing Company, Ltd.
Inventor(s)
Chao-Ching Cheng of Hsinchu (TW)
Hung-Li Chiang of Taipei City (TW)
Tzu-Chiang Chen of Hsinchu (TW)
NANO TRANSISTORS WITH SOURCE/DRAIN HAVING SIDE CONTACTS TO 2-D MATERIAL - A simplified explanation of the abstract
This abstract first appeared for US patent application 18365995 titled 'NANO TRANSISTORS WITH SOURCE/DRAIN HAVING SIDE CONTACTS TO 2-D MATERIAL
Simplified Explanation
- The patent application describes a method for forming a structure on a substrate using sacrificial layers. - The method involves creating a sandwich structure with a two-dimensional material between two isolation layers. - Source/drain regions are formed on the two-dimensional material. - Sacrificial layers are then removed to create spaces. - A gate stack is formed in the spaces. - The innovation allows for the creation of a structure with improved performance and functionality.
Original Abstract Submitted
A method includes forming a first sacrificial layer over a substrate, and forming a sandwich structure over the first sacrificial layer. The sandwich structure includes a first isolation layer, a two-dimensional material over the first isolation layer, and a second isolation layer over the two-dimensional material. The method further includes forming a second sacrificial layer over the sandwich structure, forming a first source/drain region and a second source/drain region on opposing ends of, and contacting sidewalls of, the two-dimensional material, removing the first sacrificial layer and the second sacrificial layer to generate spaces, and forming a gate stack filling the spaces.
