View source for US Patent Application 18065188. A METHOD FOR MANUFACTURING AN ELECTRICAL DEVICE WITH AN ANODIC POROUS OXIDE REGION DELIMITED BY PLANARIZING A STACK OF MATERIALS simplified abstract

=A METHOD FOR MANUFACTURING AN ELECTRICAL DEVICE WITH AN ANODIC POROUS OXIDE REGION DELIMITED BY PLANARIZING A STACK OF MATERIALS=


==Organization Name==

[[:Category:Murata Manufacturing Co., Ltd.|Murata Manufacturing Co., Ltd.]]


[[Category:Murata Manufacturing Co., Ltd.]]

==Inventor(s)==

[[:Category:Brigitte Soulier of Grenoble (FR)|Brigitte Soulier of Grenoble (FR)]][[Category:Brigitte Soulier of Grenoble (FR)]]

[[:Category:Frédéric Voiron of Barraux (FR)|Frédéric Voiron of Barraux (FR)]][[Category:Frédéric Voiron of Barraux (FR)]]

[[:Category:Julien El Sabahy of Grenoble (FR)|Julien El Sabahy of Grenoble (FR)]][[Category:Julien El Sabahy of Grenoble (FR)]]

==A METHOD FOR MANUFACTURING AN ELECTRICAL DEVICE WITH AN ANODIC POROUS OXIDE REGION DELIMITED BY PLANARIZING A STACK OF MATERIALS - A simplified explanation of the abstract==


This abstract first appeared for US patent application 18065188 titled 'A METHOD FOR MANUFACTURING AN ELECTRICAL DEVICE WITH AN ANODIC POROUS OXIDE REGION DELIMITED BY PLANARIZING A STACK OF MATERIALS

==Simplified Explanation==

The patent application describes a method for manufacturing an electrical device. Here are the key points:

* The method involves anodizing a metal layer to create a porous oxide region and an adjoining metal region.
* The porous oxide region is thicker than the metal region.
* A layer of liner material is deposited on both the porous oxide region and the metal region.
* A layer of filler material is then deposited on top of the liner material.
* The stacked structure is planarized from the top surface until the liner material is exposed.
* The exposed portion of the liner material is then removed.

Overall, this method allows for the creation of an electrical device with a specific structure and composition, which may have various applications in the field of electronics.


==Original Abstract Submitted==

A method for manufacturing an electrical device that includes: anodizing a portion of an anodizable metal layer so as to obtain an anodic porous oxide region and an anodizable metal region adjoining the anodic porous oxide region, the anodic porous oxide region being thicker than the anodizable metal region; depositing a layer of liner material on the anodic porous oxide region and on the anodizable metal region; depositing a layer of filler material on the layer of liner material to obtain a stacked structure having a top surface; planarizing the stacked structure from a top surface thereof until reaching the layer of the liner material, so as to expose a portion of liner material located above at least a portion of the anodic porous oxide region; and removing the exposed portion of liner material.



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