US Patent Application 17866343. LIMITED LATERAL GROWTH OF S/D EPI BY OUTER DIELECTRIC LAYER IN 3-DIMENSIONAL STACKED DEVICE simplified abstract
Contents
LIMITED LATERAL GROWTH OF S/D EPI BY OUTER DIELECTRIC LAYER IN 3-DIMENSIONAL STACKED DEVICE
Organization Name
Inventor(s)
Inchan Hwang of Schenectady NY (US)
Jaejik Baek of Watervliet NY (US)
Byounghak Hong of Albany NY (US)
Saehan Park of Clifton Park NY (US)
Kang-ill Seo of Albany NY (US)
LIMITED LATERAL GROWTH OF S/D EPI BY OUTER DIELECTRIC LAYER IN 3-DIMENSIONAL STACKED DEVICE - A simplified explanation of the abstract
- This abstract for appeared for US patent application number 17866343 Titled 'LIMITED LATERAL GROWTH OF S/D EPI BY OUTER DIELECTRIC LAYER IN 3-DIMENSIONAL STACKED DEVICE'
Simplified Explanation
This abstract describes an integrated circuit that consists of two semiconductor devices placed next to each other. Each semiconductor device has two transistors, one on top of the other. These transistors have different regions called source, drain, and channel. The circuit also includes two dielectric spacers, one on each side of the channel region of each transistor. Additionally, there is an interconnect contact between the two semiconductor devices.
Original Abstract Submitted
An integrated circuit includes a first semiconductor device and a second semiconductor device adjacent to the first semiconductor device. Each of the first and second semiconductor devices includes a lower transistor and an upper transistor on the lower transistor, and the upper and lower transistors each include a source region, a drain region, and a channel region extending between the source region and the drain region. The integrated circuit also includes a first dielectric spacer extending along an inner sidewall of the channel region of the upper and/or lower transistor of the first semiconductor device, a second dielectric spacer facing the first dielectric spacer and extending along an inner sidewall of the channel region of the upper and/or lower transistor of the second semiconductor device. The integrated circuit also includes an interconnect contact between the first semiconductor device and the second semiconductor device.
