Texas instruments incorporated (20240113155). WIRE BONDS FOR GALVANIC ISOLATION DEVICE simplified abstract

WIRE BONDS FOR GALVANIC ISOLATION DEVICE

Organization Name

texas instruments incorporated

Inventor(s)

Jeffrey Alan West of Dallas TX (US)

Hung-Yu Chou of Taipei city (TW)

Byron Lovell Williams of Plano TX (US)

Thomas Dyer Bonifield of Dallas TX (US)

WIRE BONDS FOR GALVANIC ISOLATION DEVICE - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240113155 titled 'WIRE BONDS FOR GALVANIC ISOLATION DEVICE

Simplified Explanation

The microelectronic device described in the patent application includes a galvanic isolation component with upper and lower isolation elements, dielectric plateau, and upper and lower bond pads. High voltage wire bonds are placed on the upper bond pads, while low voltage wire bonds are placed on the lower bond pads.

• Galvanic isolation component with upper and lower isolation elements
• High voltage wire bonds on upper bond pads
• Low voltage wire bonds on lower bond pads
• Dielectric plateau over lower isolation element
• Isolation distance separating upper and lower bond pads

Potential Applications

The technology described in the patent application could be applied in various industries such as telecommunications, automotive, and medical devices where galvanic isolation is required for safety and performance reasons.

Problems Solved

This technology solves the problem of providing galvanic isolation in microelectronic devices while allowing for high voltage wire bonds to be placed in close proximity to low voltage wire bonds without interference.

Benefits

The benefits of this technology include improved safety, reliability, and performance of microelectronic devices by effectively isolating high voltage components from low voltage components.

Potential Commercial Applications

Potential commercial applications of this technology include power supplies, motor drives, and industrial control systems where galvanic isolation is essential for operation.

Possible Prior Art

One possible prior art for this technology could be the use of isolation components in microelectronic devices to prevent interference between high and low voltage components.

How does this technology compare to existing methods of galvanic isolation in microelectronic devices?

This article does not provide a direct comparison to existing methods of galvanic isolation in microelectronic devices.

What are the specific industries that could benefit the most from this technology?

This article does not specify the specific industries that could benefit the most from this technology.

Original Abstract Submitted

a microelectronic device includes a galvanic isolation component having a lower isolation element over a substrate with lower bond pads connected to the lower isolation element, a dielectric plateau over the lower isolation element that does not extend to the lower bond pads, and an upper isolation element and upper bond pads over the dielectric plateau. the upper bond pads are laterally separated from the lower bond pads by an isolation distance. the microelectronic device includes high voltage wire bonds on the upper bond pads that extend upward, within 10 degrees of vertical, for a vertical distance greater than the isolation distance. the microelectronic device further includes low voltage wire bonds on the lower bond pads that have a loop height directly over a perimeter of the substrate that is less than 5 times a wire diameter of the low voltage wire bonds.