Samsung electronics co., ltd. (20240130212). METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE INCLUDING DOUBLE PATTERNING PROCESS simplified abstract

METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE INCLUDING DOUBLE PATTERNING PROCESS

Organization Name

samsung electronics co., ltd.

Inventor(s)

Inoue Naoki of Suwon-si (KR)

Tsunehiro Nishi of Suwon-si (KR)

Yonghoon Moon of Suwon-si (KR)

METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE INCLUDING DOUBLE PATTERNING PROCESS - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240130212 titled 'METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE INCLUDING DOUBLE PATTERNING PROCESS

Simplified Explanation

The method described in the patent application involves manufacturing a semiconductor device by forming organic and inorganic patterns on a supporting layer and selectively etching ion-implanted inorganic patterns to create space patterns between the organic patterns.

• Formation of plurality of first organic patterns on a supporting layer
• Formation of plurality of inorganic patterns in contact with the first organic patterns
• Formation of plurality of second organic patterns between the inorganic patterns
• Selective etching of ion-implanted inorganic patterns to create space patterns

Potential Applications

The technology can be applied in the manufacturing of advanced semiconductor devices, such as integrated circuits, sensors, and memory devices.

Problems Solved

The method addresses the challenge of creating intricate patterns with high precision in semiconductor manufacturing processes.

Benefits

- Improved precision in pattern formation - Enhanced performance of semiconductor devices - Increased efficiency in manufacturing processes

Potential Commercial Applications

The technology can be utilized by semiconductor manufacturers to produce high-quality devices with complex patterns, catering to various industries such as electronics, telecommunications, and automotive.

Possible Prior Art

Prior art in semiconductor manufacturing includes techniques for patterning organic and inorganic materials, but the specific method of selectively etching ion-implanted inorganic patterns to create space patterns may be novel.

Unanswered Questions

How does the method compare to existing semiconductor manufacturing techniques in terms of cost-effectiveness?

The cost-effectiveness of the method in comparison to traditional semiconductor manufacturing processes is not addressed in the abstract.

What are the potential limitations or challenges in scaling up this manufacturing method for mass production?

The abstract does not provide information on the scalability of the method for mass production and any potential challenges that may arise in the process.

Original Abstract Submitted

a method of manufacturing a semiconductor device, including forming a plurality of first organic patterns spaced apart from one another in one direction on a supporting layer, wherein the plurality of first organic patterns include ion-implanted patterns, forming a plurality of inorganic patterns on the supporting layer that are in contact with the plurality of first organic patterns and spaced apart from one other in the one direction, wherein the inorganic patterns include ion-implanted patterns, forming a plurality of second organic patterns arranged between the plurality of inorganic patterns on the supporting layer, wherein the second organic patterns include ion-implanted patterns, and selectively etching the ion-implanted inorganic patterns to form a plurality of space patterns that are arranged between the ion-implanted first organic patterns and the ion-implanted second organic patterns.