Samsung Electronics Co., Ltd. patent applications published on October 12th, 2023

Patent applications for Samsung Electronics Co., Ltd. on October 12th, 2023

SHOE CARE APPARATUS (18327452)

Inventor Daegeon KIM

SHOE CARE APPARATUS (18207353)

Inventor Dongpil SEO

Brief explanation

The abstract describes a shoe care apparatus that includes a cabinet with a shoe care compartment inside. The cabinet has a door that opens and closes the compartment. There is a supply duct on one wall of the cabinet that supplies air to the compartment. A shoe support device is connected to the supply duct and protrudes from the inner surface of the wall, allowing shoes to be placed in the compartment. Additionally, there is a sterilizer with a UV lamp installed on either the second wall of the cabinet or the door. This sterilizer is used to sterilize the shoes placed in the compartment.

Abstract

A shoe care apparatus including a cabinet, a shoe care compartment inside the cabinet, a door coupled to the cabinet and configured to open and close the shoe care compartment, a supply duct formed on a first wall of the cabinet to supply air to the shoe care compartment, a shoe support device configured to communicate with the supply duct to receive the air from the supply duct and protruding from an inner surface of the first wall of the cabinet so that shoes are placeable in the shoe care compartment, and a sterilizer installed on a second wall of the cabinet or on the door and including an ultraviolet (UV) lamp to sterilize shoes placed in the shoe care compartment.

WATER DISCHARGE UNIT AND WATER PURIFIER INCLUDING SAME (18208972)

Inventor Wanku KANG

Brief explanation

The abstract describes a water purifier that has a water discharge unit capable of dispensing purified, cold, and hot water. The water discharge unit includes a rotating body and a water discharge tube that can change its position based on the rotation of the body. The purifier also has a display device with two light sources, a light guide cover, and a guide case. These components work together to guide the light emitted from the light sources onto the light guide cover without mixing them. The light guide cover projects the light from the first light source towards the water discharge tube, indicating the direction of water flow. It also projects the light from the second light source onto the outer surface of the display device to indicate which type of water (purified, cold, or hot) is selected.

Abstract

A water purifier including a water discharge unit configured so that purified, cold, and hot water are selectably dischargeable therethrough, the water discharge unit including a rotatable body, a water discharge tube having a changeable position according to rotation of the body, and a display device including a first and a second light source, a light guide cover, and a guide case to guide light emitted from the first and second light source so as to be incident on the light guide cover, and to prevent mixing of the light from the first and the second light sources. The light guide cover projects the light from the first light source in a direction of water discharge from the water discharge tube, and projects the light from the second light source toward an outer peripheral surface of the display device to indicate which of purified, cold, and hot water is selected.

WATER PURIFIER AND CONTROL METHOD OF SAME (18206172)

Inventor Jungha PARK

Brief explanation

The abstract describes a water purifier that consists of several components. It starts with a pre-treatment filter that connects to the inlet flow path. Then, there is an auxiliary filter with a filter cap and body, which connects to a first connection flow path. The water discharged from the auxiliary filter is then introduced to a membrane filter through a second connection flow path. After that, the water goes through a post-treatment filter with a filter cap and body, and is introduced through a third connection flow path. 

There is also a branch flow path that splits off from the upstream side of the first connection flow path and merges back in on the downstream side. Along this branch flow path, an electrolysis module can be arranged. Additionally, there is an opening/closing valve along the first connection flow path, which allows the water to flow either to the first connection flow path or the branch flow path.

Abstract

A water purifier comprising a pre-treatment filter connectable to an inlet flow path; an auxiliary filter including a filter cap and a filter body, connectable to a first connection flow path; a membrane filter including a filter cap and a filter body, so that water discharged from the auxiliary filter is introduced through a second connection flow path; a post-treatment filter including a filter cap and a filter body, so that water discharged from the membrane filter is introduced through a third connection flow path; a branch flow path that branches off from an upstream side of the first connection flow path and merges on a downstream side of the first connection flow path; an electrolysis module arrangeable along the branch flow path; and an opening/closing valve arrangeable along the first connection flow path so that water flows to the first connection flow path or the branch flow path.

ORGANOMETALLIC COMPOUND, ORGANIC LIGHT-EMITTING DEVICE INCLUDING ORGANOMETALLIC COMPOUND, AND DIAGNOSTIC COMPOSITION INCLUDING ORGANOMETALLIC COMPOUND (18210212)

Inventor Yongsuk CHO

Brief explanation

The abstract describes an organometallic compound, represented by Formula 1, which is used in various applications. One application is in an organic light-emitting device, where the compound is utilized. Another application is in a diagnostic composition, where the compound is included. The abstract does not provide any further details or claims about the compound or its effectiveness in these applications.

Abstract

An organometallic compound represented by Formula 1, an organic light-emitting device including the organometallic compound, and a diagnostic composition including the organometallic compound:

ORGANOMETALLIC COMPOUND, ORGANIC LIGHT-EMITTING DEVICE INCLUDING ORGANOMETALLIC COMPOUND, AND ELECTRONIC APPARATUS INCLUDING ORGANIC LIGHT-EMITTING DEVICE (18298802)

Inventor Bumwoo Park

Brief explanation

The abstract describes an organometallic compound represented by a specific formula, referred to as Formula 1. It is important to provide a simplified explanation of the compound without overselling or exaggerating any claims.

Abstract

An organometallic compound represented by Formula 1:

QUANTUM DOTS AND DEVICE INCLUDING THE SAME (18209563)

Inventor Seon-Yeong KIM

Brief explanation

The abstract describes a cadmium-free quantum dot, which is a tiny particle made of certain semiconductor materials. This quantum dot has a core made of a specific semiconductor compound and a shell or coating made of another semiconductor compound. The quantum dot has a high quantum efficiency, meaning it can efficiently emit light, with a minimum efficiency of 60%.

Abstract

A cadmium free quantum dot or a population thereof or a device including the same, wherein the cadmium free quantum dot includes a core (or a semiconductor nanocrystal particle) including a first semiconductor including a Group IIB-VI compound and a shell (or a coating) disposed on the core (or the semiconductor nanocrystal particle) including a Group IIB-V compound and exhibits a quantum efficiency of about 60% or higher.

WASHING MACHINE FOR CONTROLLING DRYER, AND DRYER CONTROLLING METHOD PERFORMED BY WASHING MACHINE (18108197)

Inventor Hyojeong LEE

Brief explanation

This abstract describes a washing machine that is capable of wirelessly communicating with a dryer. The washing machine has a user interface that allows the user to control the dryer and receive information about it. The machine also has a processor that can determine if the front surface of the dryer is facing the same direction as the washing machine. If it is, the processor can receive the user's control input for the dryer and send corresponding commands to the dryer through the communication interface.

Abstract

A washing machine includes a communication interface for wireless communication with a dryer; a user interface configured to receive a user’s control input related to the dryer, and to output information related to the dryer; and at least one processor configured to determine whether a front surface of the dryer faces in a same direction as a front surface of the washing machine, and when it is determined that the front surface of the dryer faces in the same direction as the front surface of the washing machine, receive the user’s control input related to the dryer through the user interface and transmit, to the dryer, a control command corresponding to the user’s control input related to the dryer through the communication interface.

WASHING MACHINE AND CONTROLLING METHOD FOR SAME (18189953)

Inventor Jungchul CHOI

Brief explanation

The abstract describes a washing machine that has a body with a laundry input port, a water tank for storing water, a drum that rotates inside the water tank, and a pulsator that rotates in the opposite direction of the drum. The machine also has a first motor that drives the pulsator, a second motor that drives the drum, and a first inverter that controls the current to the first motor. Additionally, there is a second inverter that controls the current to the second motor and has a temperature sensing function. A control unit is present to control the first inverter, reducing the rotational speed or rotation time of the first motor if the temperature of the second inverter reaches a predetermined temperature.

Abstract

A washing machine according to one aspect of the disclosure comprises: a body having a laundry input port; a water tank provided inside the body and for storing water; a drum rotatably provided inside the water tank; a pulsator provided inside the drum and rotating in the direction opposite from the rotational direction of the drum; a first motor providing a driving force to the pulsator; a second motor providing a driving force to the drum; a first inverter controlling a current applied to the first motor; a second inverter controlling a current applied to the second motor and having a temperature sensing function; and a control unit controlling the first inverter such that the rotational speed of the first motor and/or the rotation time per period of the first motor is reduced if the temperature of the second inverter reaches a predetermined first temperature.

WASHING MACHINE (18209591)

Inventor Hyun Dong JUNG

Brief explanation

The abstract describes a washing machine that has two separate tubs for washing clothes. The first tub is covered by a housing and the second tub is covered by another housing placed above the first one. The machine also has two detergent suppliers. The first supplier supplies detergent to the first tub, while the second supplier supplies detergent to the second tub using a siphonage system when water is being supplied for laundry. The second supplier has a valve device in the detergent supply path to prevent water from flowing backwards due to buoyancy.

Abstract

A washing machine is disclosed. The washing machine include a first housing, a second housing arranged above the first housing, a first tub covered by the first housing, a second tub covered by the second housing, and a first detergent supplier arranged to supply a detergent to the first tub, a second detergent supplier having a first supply assembly arranged to supply a detergent to the second tub by siphonage when water for laundry is being supplied, wherein the first supply assembly comprises a first valve device arranged in a detergent supply path, in which a detergent is moved to the second tub, for preventing water for laundry from flowing backwards by buoyancy.

OVEN (18203779)

Inventor Hyoseon KWAK

Brief explanation

The abstract describes an oven with a cooking chamber and a heat source. It also includes a drawer device underneath the oven, which has holes in its upper surface and a plate that covers the holes. The plate creates a gap between itself and the upper surface, allowing air in the drawer to flow through the holes and supply the heat source with air.

Abstract

An oven according to the present invention includes: a body having a cooking chamber provided in the body; a heat source in the cooking chamber to heat the cooking chamber; and a drawer device under the body, and including: a drawer case having one or more holes in the upper surface of the drawer case; and a plate covering the one or more holes and forming a gap between the plate and the upper surface, wherein the gap is configured to allow a flow path through the gap for air in the drawer case to be supplied to the heat source through the one or more holes.

REFRIGERATOR (18209984)

Inventor Youngmin YOU

Brief explanation

This abstract describes a refrigerator that has a purifier assembly to clean the cold air that is discharged from the refrigerator. The purifier assembly includes an air purifier that removes odors or sterilizes the air, and a housing that contains the air purifier and faces the cold air outlet. The purifier assembly is installed in the refrigerator, with part of the housing inside the storage compartment and the rest outside.

Abstract

A refrigerator includes: an inner case defining a storage compartment; a cold air outlet provided on one side of the storage compartment and configured to discharge cold air; and a purifier assembly provided at an upper surface of the storage compartment and configured to purify a portion of the cold air discharged from the cold air outlet, wherein the purifier assembly includes: an air purifier configured to deodorize or sterilize the cold air; and a housing including the air purifier and an inlet facing the cold air outlet, wherein the inlet is configured to receive the cold air discharged from the cold air outlet, the purifier assembly penetrates the inner case, and a portion of the housing is provided inside the storage compartment and a remaining portion of the housing is provided outside the storage compartment.

REFRIGERATOR AND METHOD OF CONTROLLING THE SAME (18209602)

Inventor Daewhan KIM

Brief explanation

This abstract describes a refrigerator and its control method. The refrigerator includes a storage compartment with a door, as well as a beverage provider. The beverage provider has a water supplying unit, a storage for the supplied water, a filter that holds beverage powder to infuse its ingredients into the water, a sensor to measure the concentration of the resulting beverage, and a processor to adjust the water supply based on the identified concentration. In simpler terms, this refrigerator has a built-in system to make beverages by mixing water and powdered ingredients, and it can automatically adjust the amount of water based on the desired concentration of the beverage.

Abstract

A refrigerator and a method of controlling the same, the refrigerator including: a main body including a storage compartment; a door to open and close the storage compartment; and a beverage provider arrangeable with respect to the main body or the door. The beverage provider including: a water supplying unit; a storage to store water supplied by the water supplying unit; a filter, arrangeable inside the storage, and accommodate beverage powder so that ingredients from the beverage powder accommodated in filter are leached into the water; a sensor to obtain information related to a concentration of a beverage produced to contain the ingredients of the beverage powder in the water; and a processor configured to identify the concentration of the beverage based on the obtained information, and control the water supplying unit to supply the water in an amount which is adjusted based on the identified concentration.

APPARATUS AND METHOD FOR ESTIMATING BODY WATER STATUS (17877277)

Inventor JUNE YOUNG LEE

Brief explanation

The abstract describes an apparatus that can estimate the body water status of an object, such as a person. The apparatus includes a spectrometer with a light source and a detector. The light source emits light onto the object, and the detector measures the near-infrared absorption spectrum by detecting the light scattered or reflected from the object. A processor then uses this information to estimate the concentration of albumin in the object and calculate a body water index. The body water index is estimated using a model that represents the relationship between changes in albumin concentration and changes in the amount of body water in the object.

Abstract

An apparatus for estimating body water status includes a spectrometer having a light source configured to emit light onto an object, and a detector configured to measure a near-infrared (NIR) absorption spectrum by detecting light scattered or reflected from the object; and a processor configured to estimate an albumin concentration in the object based on the measured NIR absorption spectrum, and to estimate a body water index based on the estimated albumin concentration by using a body water index estimation model that represents a relationship between a change in the albumin concentration and a change in an amount of body water present in the object.

MULTI-DEVICE BISTATIC SENSING (18160920)

Inventor Jeongho Jeon

Brief explanation

The abstract describes a method for combining cellular communication and object sensing in a mobile device. The mobile device, also known as a UE (User Equipment), can be configured to either receive a sensing signal from a base station or transmit the sensing signal for the base station to receive. The configuration includes details such as the power, waveform, and resources needed for the sensing signal, as well as how often it should be transmitted. Additionally, the configuration can specify whether the UE should receive or transmit an object detection report.

Abstract

Joint configuration of cellular communication and bistatic object sensing involves transmitting, to a UE, a bistatic object sensing configuration. The bistatic object sensing configuration configures the UE to one of receive a sensing signal transmitted by a base station or transmit the sensing signal for reception by the base station. The bistatic object sensing configuration indicates sensing transmission power, waveform, and sensing resources and periodicity for the sensing signal, and may configure the UE to one of receive or transmit an object detection report.

IMAGE SENSOR INCLUDING COLOR SEPARATING LENS ARRAY AND ELECTRONIC APPARATUS INCLUDING THE IMAGE SENSOR (18208566)

Inventor SEOKHO YUN

Brief explanation

The abstract describes an image sensor that uses a color separating lens array. The image sensor has a sensor substrate with two pixels, one for sensing first wavelength light and the other for sensing second wavelength light. The color separating lens array has a region that condenses the first wavelength light onto the first pixel. The area of this condensing region is larger than the area of the first pixel, and the distance between the sensor substrate and the lens array is shorter than the focal distance of the condensing region for the first wavelength light.

Abstract

Provided is an image sensor including a color separating lens array. The image sensor includes a sensor substrate including a first pixel configured to sense first wavelength light, and a second pixel configured to sense second wavelength light; and a color separating lens array including a first wavelength light condensing region in which the first wavelength light is condensed onto the first pixel, wherein an area of the first wavelength light condensing region is greater than an area of the first pixel, and a distance between the sensor substrate and the color separating lens array is less than a focal distance of the first wavelength light condensing region with respect to the first wavelength light.

LIGHT MODULATOR, OPTICAL DEVICE INCLUDING LIGHT MODULATOR, AND ELECTRONIC APPARATUS INCLUDING OPTICAL DEVICE (18334838)

Inventor Junghyun PARK

Brief explanation

The abstract describes a light modulator that can change the phase of incident light by adjusting its refractive index. The modulator consists of a substrate and a resonator. The resonator includes a first reflective structure on the substrate, a cavity layer on top of the first reflective structure, and a second reflective structure on the cavity layer. The first and second reflective structures are made up of alternating layers of different materials, while the cavity layer is made of a third material. Each material layer has a different refractive index.

Abstract

Provided is a light modulator including a substrate, and a resonator configured to modulate a phase of incident light by modulating a refractive index based on an external stimulus, the resonator comprising a first reflective structure provided on the substrate, a cavity layer provided on the first reflective structure, and a second reflective structure provided on the cavity layer, wherein at least one of the first reflective structure or the second reflective structure comprises first material layers, second material layers that are alternately stacked with the first material layers, and a third material layer, and wherein each of the first material layers has a first refractive index, each of the second material layers has a second refractive index that is different from the first refractive index, and the third material layer has a third refractive index that is different from the first refractive index

PHOTOACID GENERATOR, PHOTORESIST COMPOSITION INCLUDING THE SAME, AND METHOD OF PREPARING THE PHOTOACID GENERATOR (18313555)

Inventor Eunkyung LEE

Brief explanation

The abstract describes a photoacid generator, which is a chemical compound used in the production of photoresist compositions. The photoresist composition is a material used in the semiconductor industry for patterning and etching processes. The abstract also mentions a method for preparing the photoacid generator. The specific compound mentioned in the abstract is represented by Formula 1, but no further details are provided.

Abstract

Disclosed are a photoacid generator, a photoresist composition including the same, and a method of preparing the photoacid generator. The photoacid generator may include a compound represented by Formula 1:

MACHINE LEARNING (ML)-BASED PROCESS PROXIMITY CORRECTION (PPC) METHOD AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD INCLUDING THE SAME (17990900)

Inventor Sooyong Lee

Brief explanation

This abstract describes a machine learning-based method for correcting patterns in the manufacturing of semiconductor devices. The method involves analyzing a layout of the device, extracting features from a specific pattern, and using machine learning to create a prediction model. The model is then used to generate a target layout that maximizes the process margin. The original layout is corrected to match the target, and the prediction model is used to predict the outcome of the manufacturing process based on the corrected layout.

Abstract

A machine learning (ML)-based process proximity correction (PPC) method includes receiving a first layout of an after clean inspection (ACI) including patterns for manufacturing a semiconductor device, extracting features of a first pattern from the first layout, generating a prediction model through ML based on the features of the first pattern, generating an ACI target having a maximum process margin by comparing an upper limit value and a lower limit value of the ACI for at least one condition, generating a second layout of an after development inspection (ADI) by correcting the first layout to correspond to the ACI target, and predicting the ACI through the prediction model, based on the second layout of the ADI.

METHODS AND SYSTEMS FOR SELECTING VOLTAGE FOR A SUBSTRATE CONNECTION OF A BYPASS SWITCH (17829690)

Inventor Ankur Ghosh

Brief explanation

The abstract describes methods and systems for choosing the voltage for a substrate connection of a bypass switch in a regulator. This is done using a bulk voltage generation circuit that is connected externally to the regulator. The bulk voltage generation circuit can select the voltage for the substrate connection from either an Input/Output (I/O) supply voltage or a core supply voltage. The selection is based on the mode of operation of the regulator and the presence or order in which the I/O supply voltage and core supply voltage are available.

Abstract

Methods and systems for selecting voltage for a substrate connection of a bypass switch include a bulk voltage generation circuit coupled externally to the regulator. The bulk voltage generation circuit is configured to control selection of a voltage from among an Input/Output (I/O) supply voltage and a core supply voltage for a substrate connection of a bypass switch of the regulator. The bulk voltage generation circuit is configured to select the voltage for the substrate connection of the bypass switch based on a mode of operation of the regulator and at least one of a presence or an arrival sequence of the I/O supply voltage and the core supply voltage.

FLEXIBLE ELECTRONIC DEVICE AND METHOD FOR CONTROLLING DISPLAY OF APPLICATION EXECUTION SCREEN (18209749)

Inventor Byungwoo MIN

Brief explanation

This abstract describes an electronic device that consists of two housings, with one housing sliding to change the size of the display. The device has a memory and a processor that can execute instructions. When the display is in the first size, the device can show a recent task list of applications in a specific aspect ratio. When the display is in the second size, the device can show the same task list in a different aspect ratio.

Abstract

According to certain embodiments, an electronic device further comprises: a first housing; a second housing slidably coupled with respect to the first housing; a display in which an viewable area to an outside of the electronic device is changeable from a first size to a second size according to a sliding distance of the second housing with respect to the first housing; a memory storing computer-executable instructions; and a processor configured to access the memory and execute the computer-executable instructions, wherein execution of the computer-executable instructions by the processor causes the processor to perform a plurality of operations, the plurality of operations comprising: in response to receiving a first input requesting a recent task list of at least one application being serviced when the viewable area has the first size, display at least one execution screen image having a first aspect ratio for the first size corresponding to the at least one application; and when the viewable area has the second size, displaying the at least one execution screen image having a second aspect ratio for the second size.

WEARABLE DEVICE AND METHOD FOR DETECTING MOTION GESTURE OF WEARABLE DEVICE (18333950)

Inventor Jinik KIM

Brief explanation

This abstract describes a method and device that includes a touch sensor, an inertial sensor, a biometric sensor, a communication module, a memory, and a processor. The touch sensor is located on the outside of a housing and has touch interfaces for different areas. The inertial sensor has a specific sensor axis. The biometric sensor is located inside the housing. The communication module includes communication circuitry. The memory stores the angle corresponding to the touch detection range for each touch interface. The processor is connected to all the components and is responsible for detecting if the wearable device is being worn using the biometric sensor or the inertial sensor. It also receives touch information from the touch interfaces, calibrates the sensor axis of the inertial sensor based on the touch information, obtains sensing information from the inertial sensor, and calculates position information based on the calibrated sensor axis.

Abstract

Various embodiments of the present disclosure disclose a method and device, the device comprising: a touch sensor disposed adjacent to the outside of a housing and including touch interfaces for a plurality of areas; an inertial sensor having a set sensor axis; a biometric sensor disposed adjacent to the inside of the housing; a communication module comprising communication circuitry; a memory which maps and stores an angle corresponding to a touch detection range of each touch interface of the touch sensor; and a processor operatively connected to the touch sensor, the inertial sensor, the biometric sensor, the communication module, and the memory. The processor is configured to: detect whether a wearable device is worn using the biometric sensor and/or the inertial sensor; receive touch information from at least one of the plurality of touch interfaces included in the touch sensor; calibrate the sensor axis of the inertial sensor based on the touch information; obtain sensing information from the inertial sensor; and calculate position information from the sensing information based on the calibrated sensor axis.

STORAGE DEVICE REORGANIZING DATA AND RELATED OPERATING METHOD (18107029)

Inventor SANG OAK WOO

Brief explanation

This abstract describes an electronic system that consists of a host, a computing resource device, and a storage device. The host sends a command and source data with a specific structure to the storage device. The storage device has a storage medium where the source data is stored, and a data reorganizing unit that converts the source data into a different structure called reorganized source data. The storage device then sends the reorganized source data to the computing resource device as destination data.

Abstract

An electronic system includes; a host providing a command and source data having a source data structure, a computing resource device operating in relation to destination data having a destination data structure different from the source data structure, and a storage device. The storage device receives the command from the host and includes a storage medium storing the source data, and a data reorganizing unit converting the source data into reorganized source data, wherein the storage device outputs the reorganized source data to the computing resource device as destination data.

STORAGE DEVICE AND OPERATING METHOD THEREOF (18086777)

Inventor TAE-HWAN KIM

Brief explanation

The abstract describes a storage device that uses a nonvolatile memory device and a storage controller to manage and update metadata. The storage controller includes a journal data generator that creates multiple journal data entries related to the metadata updates. It also includes a journal data replayer that replays these journal data entries simultaneously to restore the metadata.

Abstract

Disclosed is a storage device which includes a nonvolatile memory device, and a storage controller that controls the nonvolatile memory device and updates metadata based on an operation of the nonvolatile memory device, and the storage controller includes a journal data generator that generates a plurality of journal data associated with the update of the metadata, and a journal data replayer that replays the plurality of journal data in parallel to restore the metadata.

SYSTEMS AND METHODS FOR HYBRID STORAGE (17827298)

Inventor Shrihari Sridharan

Brief explanation

This abstract describes a method for storing and processing data. It involves identifying a database in a memory of a device, partitioning the database into rows based on a specified size, converting the data in the rows into a column-based format, and storing the data in a computational storage device. This computational storage device is designed to retrieve and process the data in response to queries.

Abstract

Embodiments of the present disclosure are directed to a method for storing and processing data. The method includes identifying a database in a memory of a host device having one or more rows and one or more columns. A partition having a partition size is identified, and the one or more rows of the database is identified based on the partition size. The data stored in the one or more rows is converted into a column-based format, and the data is stored in a computational storage device in the column-based format. The computational storage device is configured to retrieve the data stored in the column-based format, in response to a query, and process the query based on the data.

OPERATION METHOD OF HOST DEVICE AND OPERATION METHOD OF STORAGE DEVICE (18188882)

Inventor Jaehwan JUNG

Brief explanation

This abstract describes a method for a host device to control a storage device. The host device receives initial mapping information from the storage device and performs an initial migration of source data from one region of the storage device to another region based on this information. The host device then receives first dirty information about first dirty data from the storage device and performs a first migration of this data based on the first dirty information. Similarly, the host device receives second dirty information about second dirty data and performs a second migration of this data based on the second dirty information. It is noted that the size of the first dirty information is different from the size of the second dirty information.

Abstract

An operation method of a host device configured to control a storage device includes receiving initial mapping information from the storage device, performing initial migration based on the initial mapping information such that source data present in a first region of the storage device migrate to a second region, receiving first dirty information about first dirty data of the source data from the storage device, performing first migration on the first dirty data based on the first dirty information, receiving second dirty information about second dirty data of the source data from the storage device, and performing second migration on the second dirty data based on the second dirty information, and a size of the first dirty information is different from a size of the second dirty information.

SYSTEM AND METHOD FOR PERFORMING DATA READ-WRITE OPERATIONS IN ZONED STORAGE DEVICES (17835759)

Inventor RAKESH BALAKRISHNAN

Brief explanation

This abstract describes a method for transferring data from one storage device to another. The method involves reading data from one or more zones on the source storage device and then sequentially writing that data to one or more zones on the destination storage device. The source and destination storage devices are different from each other.

Abstract

A method for performing a data read-write operation across multiple zoned storage devices includes reading data from at least one zone of a source zoned storage device and sequentially writing the read data to at least one zone of a destination zoned storage device, where the source zoned storage device is different from the destination zoned storage device.

METHOD OF OPERATING STORAGE DEVICE, STORAGE DEVICE PERFORMING THE SAME AND METHOD OF OPERATING STORAGE SYSTEM USING THE SAME (18335328)

Inventor DONG-WOO KIM

Brief explanation

This abstract describes a method for operating a storage device. The storage device receives a command from a host device to transfer meta information based on a data read request. It also receives a data read command and a set of meta data from the host device. The storage device then performs a data read operation based on the received commands and meta data.

Abstract

A method of operating a storage device includes receiving, at the storage device, a meta information transfer command based on a data read request. The meta information transfer command is received from a host device. The method further includes receiving, at the storage device, a data read command corresponding to the data read request and the meta information transfer command. The data read command is received from the host device. The method further includes receiving, at the storage device, a plurality of meta data corresponding to the data read request and the meta information transfer command. The plurality of meta data is received from the host device. The method further includes performing a data read operation, at the storage device, based on the data read command and the plurality of meta data.

METHOD FOR PRELOADING APPLICATION AND ELECTRONIC DEVICE SUPPORTING SAME (18322919)

Inventor Jinshik BAE

Brief explanation

This abstract describes an electronic device that has a flexible display and a housing with two parts that can move. The display area of the device can expand or reduce depending on the movement of the housing. The device has a memory and a processor. The processor is programmed to detect changes in the display area size based on the movement of the housing. It then determines which application should be preloaded onto the device based on the size of the display area. The processor loads a preload process into the memory, which contains some of the resources needed to run the chosen application. When an event related to the execution of the preloaded application occurs, the processor loads an activity to execute the application using the preload process.

Abstract

An electronic device may include: a housing including a first housing and a second housing movable with respect to the first housing; a flexible display in which a display area for displaying a screen is expanded or reduced as the second housing moves with respect to the first housing; a memory; and a processor, wherein the processor is configured to: identify a change in the size of the display area on the basis of the movement of the second housing relative to the first housing; determine an application to be preloaded from among a plurality of applications on the basis of the identified size of the display area; load, into the memory, a preload process including some of resources for executing the determined application to be preloaded; and, in response to the occurrence of an event associated with the execution of the application to be preloaded, load an activity for the execution of the application by using the loaded preload process.

ELECTRONIC DEVICE MANAGING MEMORY AND OPERATION METHOD THEREFOR (18333061)

Inventor Jiman KWON

Brief explanation

The abstract describes an electronic device that has a memory and a processor. The processor is programmed to recognize when a specific application that requires a lot of memory is running. It then calculates the amount of memory needed to run the application and terminates other processes that are using memory until enough memory is available for the application to run smoothly.

Abstract

An electronic device is provided. The electronic device includes a memory and a processor. The processor may be configured to identify that an application using large-capacity memory satisfying a specified condition is running, identify a first memory capacity required to run the application, and terminate at least one process allocated to the memory until the first memory capacity is secured as the available capacity of the memory.

METHOD AND APPARATUS FOR AUTOSCALING CONTAINERS IN A CLOUD-NATIVE CORE NETWORK (18042288)

Inventor Yue WANG

Brief explanation

This abstract describes a communication method and system that combines 5G technology with Internet of Things (IoT) technology. It focuses on supporting higher data rates and enabling intelligent services such as smart home, smart city, and connected car. The abstract also introduces a method that uses artificial intelligence (AI) to automatically adjust the number of containers in a cloud-native core network based on certain metrics. This autoscaling decision is made using a trained machine learning model.

Abstract

The present disclosure relates to a communication method and system for converging a 5th-Generation (5G) communication system for supporting higher data rates beyond a 4th-Generation (4G) system with a technology for Internet of Things (IoT). The present disclosure may be applied to intelligent services based on the 5G communication technology and the IoT-related technology, such as smart home, smart building, smart city, smart car, connected car, health care, digital education, smart retail, security and safety services. A method performed by an artificial intelligence (AI) module for autoscaling containers of a cloud-native core network with containerised network functions is provided. The method comprising requesting, from at least one metrics server, at least one metric required to make an autoscaling decision with respect to at least one set of containers; receiving the at least one metric from the at least one metrics server; processing the received at least one metric, using a trained machine learning (ML) model, to make an autoscaling decision with respect to the set of containers; and implementing the autoscaling decision with respect to the set of containers.

MEMORY CONTROLLER PERFORMING SELECTIVE AND PARALLEL ERROR CORRECTION, SYSTEM INCLUDING THE SAME AND OPERATING METHOD OF MEMORY DEVICE (18335375)

Inventor Hyeokjun CHOE

Brief explanation

This abstract describes a memory controller that is designed to manage the memory accessed by a device connected to a host processor through a bus. The memory controller has two interface circuits, one to communicate with the host processor and the other to communicate with the memory. It also includes an error detection circuit that can identify errors in data received from the memory in response to a read request from the host processor. The memory controller has a variable error correction circuit that can correct the detected errors based on a reference latency and a reference error correction level provided in an error correction option. Additionally, there is a fixed error correction circuit that can correct errors simultaneously with the variable error correction circuit.

Abstract

A memory controller is provided that is configured to control a memory accessed by a device connected to a host processor via a bus. The memory controller is configured to control a memory accessed by a device connected to a host processor via a bus, and includes a first interface circuit configured to communicate with the host processor; a second interface circuit configured to communicate with the memory; an error detection circuit configured to detect an error present in data received from the second interface circuit in response to a first read request received from the first interface circuit; a variable error correction circuit configured to correct the error based on at least one of a reference latency and a reference error correction level included in a first error correction option; and a fixed error correction circuit configured to correct the error in parallel with an operation of the variable error correction circuit.

ADAPTIVE MULTIPATH FABRIC FOR BALANCED PERFORMANCE AND HIGH AVAILABILITY (18332242)

Inventor Gunneswara R. Marripudi

Brief explanation

The abstract describes a computing system that ensures high availability of computing resources. It consists of multiple interfaces, sets of computing resources, and switches. Each set of computing resources includes multiple computing resources, and each switch is connected to an interface and a set of computing resources. If one switch fails, the remaining switches distribute data traffic through cross-connections between them.

Abstract

A computing system providing high-availability access to computing resources includes: a plurality of interfaces; a plurality of sets of computing resources, each of the sets of computing resources including a plurality of computing resources; and at least three switches, each of the switches being connected to a corresponding one of the interfaces via a host link and being connected to a corresponding one of the sets of computing resources via a plurality of resource connections, each of the switches being configured such that data traffic is distributed to remaining ones of the switches through a plurality of cross-connections between the switches if one of the switches fails.

ELECTRONIC DEVICE AND CONTROL METHOD THEREFOR (18208092)

Inventor Sangmin LEE

Brief explanation

This abstract describes an electronic device that includes sensors, a communication circuit, memory, and a processor. The processor is responsible for identifying the internal temperature of the device using the sensors and providing this data to an external device. It can also receive a prediction model for the surface temperature of the device from the external device. Using this model and information about the location of different modules stored in memory, the processor can predict the surface temperature of the device. Based on this prediction, it can select which heat sources within the device should be controlled for heating purposes.

Abstract

An electronic device, including: at least one sensor; a communication circuit; a memory; and at least one processor operationally connected with the at least one sensor, the communication circuit, and the memory, wherein the at least one processor is configured to: identify an internal temperature of the electronic device using the at least sensor; provide, to an external device, internal temperature data associated with the internal temperature of the electronic device; receive a surface temperature prediction model for predicting a surface temperature of the electronic device from the external device; predict the surface temperature of the electronic device based on the surface temperature prediction model and information associated with a module location, the information being stored in the memory; and select at least one heat source to enter heating control from among a plurality of modules of the electronic device based on the predicted surface temperature.

SYSTEMS AND METHODS FOR PRE-POPULATING ADDRESS TRANSLATION CACHE (17879713)

Inventor Daniel Lee Helmick

Brief explanation

This abstract describes a system and method for processing commands from a host computing device to a storage device. The storage device identifies a command from the host device, which includes a logical address. It then detects a condition and requests the translation of the logical address into a physical address. The physical address is stored in a cache, and data is transferred based on the command and the physical address.

Abstract

Systems and methods for processing commands from a host computing device to a storage device are disclosed. The method includes identifying, by the storage device, a command from the host computing device, the command including a logical address; detecting a condition; based on detecting the condition, requesting, by the storage device, translation of the logical address into a physical address; storing, by the storage device, the physical address in a cache; and transferring data according to the command based on the physical address.

SELF-CONFIGURING SSD MULTI-PROTOCOL SUPPORT IN HOST-LESS ENVIRONMENT (18206079)

Inventor Sompong Paul OLARIG

Brief explanation

The abstract describes a device that is capable of configuring itself. The device has an interface that allows it to communicate with a chassis and supports multiple transport protocols. It also has a Vital Product Data (VPD) reading logic, which reads information from the chassis, and a built-in self-configuration logic. Based on the VPD, the device can automatically configure its interface to use a specific transport protocol and disable other alternative protocols.

Abstract

A device that may configure itself is disclosed. The device may include an interface that may be used for communications with a chassis. The interface may support a plurality of transport protocols. The device may include a Vital Product Data (VPD) reading logic to read a VPD from the chassis and a built-in self-configuration logic to configure the interface to use one of the transport protocols and to disable alternative transport protocols, responsive to the VPD.

APPARATUS AND METHOD WITH ACCELERATING ARTIFICIAL NEURAL NETWORK (18296165)

Inventor Gopinath Vasanth MAHALE

Brief explanation

The abstract describes a computer processor apparatus that performs a specific type of mathematical operation called a Winograd convolution. This operation involves transforming input feature maps and kernels, multiplying them together, and then performing an inverse transform to generate output feature maps. The apparatus includes modules for each step of this process.

Abstract

A processor-implemented apparatus includes a forward transform module configured to transform input feature maps (IFMs) by performing a forward transform operation in a Winograd convolution (WinConv) domain, multiply and accumulate array (MAA) units configured to multiply the transformed IFMs by transformed kernels and perform a first inverse transform operation based on results of the multiplying, and an inverse transform module configured to generate output feature maps (OFMs) based on a result of the first inverse transform operation.

METHOD AND APPARATUS FOR PROCESSING BIOMETRIC INFORMATION IN ELECTRONIC DEVICE (18328412)

Inventor Teain AN

Brief explanation

This abstract describes a method and device for processing biometric information in an electronic device. The device has a processor that can operate in either a normal mode or a secure mode. In the normal mode, the device detects a biometric input event from a biometric sensor module. In the secure mode, the device creates biometric data based on the sensed data from the biometric sensor module. The device then performs either biometric registration or biometric authentication based on the created biometric data in the secure mode. Finally, the device provides the result information of the biometric registration or authentication in the normal mode.

Abstract

A method and apparatus for processing biometric information in an electronic device including a processor that operates at a normal mode or at a secure mode, the method comprising, detecting a biometric input event from a biometric sensor module at normal mode, creating biometric data based on sensed data from the biometric sensor module at the secure mode, performing biometric registration or biometric authentication based on the created biometric data at the secure mode, and providing result information of biometric registration or biometric authentication at the normal mode.

CELL LIBRARIES, COMPUTING SYSTEMS, AND METHODS FOR DESIGNING AN INTEGRATED CIRCUIT (18149749)

Inventor Juyeon Kim

Brief explanation

The abstract describes a cell library that is stored in a computer-readable storage medium. This library is designed to store two types of delay information for a standard cell. The first type of delay information is based on the threshold voltage of a transistor within the standard cell, while the second type is based on the mobility of the transistor.

Abstract

A cell library is provided. The cell library is stored in a computer-readable storage medium. The cell library is configured to store: first delay information of a standard cell according to a threshold voltage of a transistor included in the standard cell; and second delay information of the standard cell according to mobility of the transistor included in the standard cell.

METHOD VERIFYING PROCESS PROXIMITY CORRECTION USING MACHINE LEARNING, AND SEMICONDUCTOR MANUFACTURING METHOD USING SAME (17903070)

Inventor SEORIM MOON

Brief explanation

The abstract describes a method for manufacturing a semiconductor chip. The process involves creating a layout pattern and then applying Process Proximity Correction (PPC) to generate a corrected layout pattern. Machine learning is used to verify the correctness of the corrected layout pattern. Optical Proximity Correction (OPC) is then applied to the corrected layout pattern to generate a final corrected pattern. A mask is manufactured using this final pattern, and finally, a semiconductor chip is manufactured using the mask.

Abstract

A method of manufacturing a semiconductor chip includes; generating a layout pattern, performing Process Proximity Correction (PPC) on the layout pattern to generate a PPC layout pattern, wherein the performing of PPC includes verifying the PPC layout pattern using machine learning, performing Optical Proximity Correction (OPC) on the PPC layout pattern to generate an OPC layout pattern, manufacturing a mask using the OPC layout pattern, and manufacturing a semiconductor chip using the mask.

ADVERTISEMENT TARGET DETERMINING DEVICE AND ADVERTISEMENT TARGET DETERMINING METHOD (18123105)

Inventor Sanghun PARK

Brief explanation

The abstract describes a method for determining an advertisement target based on an advertisement request. The method involves collecting usage history information and device features from multiple devices. Feature vectors are generated based on the collected features. Labels are determined for the devices based on the advertisement request and the obtained features. An advertisement target inference model is created using the determined labels and feature vectors. Finally, the model is applied to the devices to determine at least one advertisement target device.

Abstract

Provided is a method of determining an advertisement target according to an advertisement request, the method includes: obtaining usage history information from a plurality of devices, obtaining features of the plurality of devices, based on the usage history information, and generating feature vectors for the obtained features; determining labels for the plurality of devices, based on the advertisement request and the obtained features; generating an advertisement target inference model, based on the determined labels and the feature vectors; and determining at least one advertisement target device among the plurality of devices by applying the generated advertisement target inference model to the plurality of devices.

ELECTRONIC DEVICE AND IMAGE PROCESSING METHOD THEREOF (18334896)

Inventor Yoonjung CHOI

Brief explanation

The abstract describes an image processing method that involves correcting an initial image, obtaining a corrected version of the image, and identifying specific parts of the corrected image to recommend further enhancements. The method includes displaying indicators for these parts and automatically applying correction functions to enhance the image. It also offers a comparison display function and an enlarged display function for the enhanced image.

Abstract

An example image processing method may include determining a first image to be corrected; obtaining a second image by correcting the first image; and identifying at least one part, from among a plurality of parts in the second image, for recommending an effect caused by correction. The method may include displaying an indicator indicating at least one part in the second image and correction may be performed by automatically recommending and applying one or more correction functions for image enhancement to each image. The method may provide an original comparison display function or an enlarged display function for an enhanced image.

METHOD AND APPARATUS FOR ACQUIRING IMAGE USING MULTISPECTRAL SENSOR (18100060)

Inventor Woo-Shik KIM

Brief explanation

The abstract describes a method for acquiring an image using a multispectral sensor. The method involves acquiring signals from multiple channels, determining the cumulative infrared signal from these signals, calculating the infrared component of each channel based on their individual characteristics, and finally obtaining corrected channel signals by removing the infrared component from each channel signal.

Abstract

A method of acquiring an image includes: acquiring channel signals corresponding to more than four channels from a multispectral sensor; determining a cumulative infrared signal included in all of the channel signals by synthesizing the infrared components of the channel signals; calculating an infrared component of each channel, based on the cumulative infrared signal and individual characteristics of the channels; and acquiring corrected channel signals by removing the infrared component from each of the channel signals.

METHOD AND APPARATUS FOR EYE TRACKING (18333098)

Inventor Jingu HEO

Brief explanation

The abstract describes a method and device for tracking the movement of a person's eye. It involves detecting the area of the eye in an image, determining a characteristic of that area, selecting an appropriate eye tracker based on that characteristic, and then tracking the eye in subsequent frames of the image using the selected eye tracker.

Abstract

Provided is a method and apparatus for eye tracking. An eye tracking method includes detecting an eye area corresponding to an eye of a user in a first frame of an image; determining an attribute of the eye area; selecting an eye tracker from a plurality of different eye trackers, the eye tracker corresponding to the determined attribute of the eye area; and tracking the eye of the user in a second frame of the image based on the selected eye tracker, the second frame being subsequent to the first frame.

APPLICATION MATCHING METHOD AND APPLICATION MATCHING DEVICE (18128751)

Inventor Meng WANG

Brief explanation

This abstract describes a method for matching applications based on their icons. The method involves acquiring multiple icons, including icons for two different applications. The text in at least one of the icons is recognized, and its category is determined. The similarity between the two icons is then determined based on the category of the text. Finally, it is determined whether the first application matches the second application based on the similarity.

Abstract

An application matching method that includes: acquiring a plurality of icons comprising a first icon corresponding to a first application and a second icon corresponding to a second application, recognizing a text in at least one of the plurality of icons, determining a category of the text, determining a similarity between the first icon and the second icon based on a category determination result of the text, and determining whether the first application matches the second application based on the similarity.

ELECTRONIC APPARATUS AND METHOD FOR CONTROLLING THEREOF (18208976)

Inventor Jisung YOO

Brief explanation

The abstract describes an electronic device that can create a 3D avatar of a person based on an image. The device uses a communication interface, memory, and processor to obtain an image with a person, obtain a 3D shape model of the person from the image, map the image's texture onto the 3D shape model using identification information, and generate a 3D avatar of the person.

Abstract

Provide is an electronic apparatus that includes a communication interface, a memory storing at least one instruction, and a processor configured to execute the at least one instruction to: obtain an image including a person object, obtain a 3D shape model corresponding to the person object included in the image, map a texture of the image to the 3D shape model based on identification information for each area of the 3D shape model, and generate a 3D avatar corresponding to the person object based on the 3D shape model to which the texture of the image is mapped.

FACE VERIFICATION METHOD AND APPARATUS (18333195)

Inventor Changyong SON

Brief explanation

This abstract describes a method and device for verifying a user's face on a mobile device. The device obtains images of the user and checks if any of the images are taken from a distance outside a certain range. Based on the result, the device performs verification using a stricter threshold for images taken from outside the range, and a less strict threshold for images taken within the range.

Abstract

Disclosed is a face verification method and apparatus. A mobile device may include one or more processors configured to obtain one or more images for a user, ascertain whether any of the one or more images correspond to respective user distances, from the user to the mobile device, outside of a threshold range of distances, and selectively, based on a result of the ascertaining, perform verification using a first verification threshold for any of the one or more images ascertained to correspond to the respective user distances that are outside the threshold range of distances, and perform verification using a less strict second verification threshold for any of the one or more images that have been ascertained to not correspond to the respective user distances that are outside the threshold range of distances.

METHOD OF OPERATING DISPLAY DRIVER INTEGRATED CIRCUIT, POWER MANAGEMENT INTEGRATED CIRCUIT AND ELECTRONIC DEVICE INCLUDING THE SAME, AND METHOD OF OPERATING THE SAME (18097948)

Inventor Kyounghwan KWON

Brief explanation

The abstract describes a method used by a display driver integrated circuit (DDI) to determine if a change in the level of a logic voltage is needed. If a change is required, the DDI sends a command to a power management integrated circuit (PMIC) to adjust the logic voltage level. The DDI then receives a different logic voltage level from the PMIC based on the command sent.

Abstract

An operating method of a display driver integrated circuit (DDI) includes determining whether a change to a level of a first logic voltage supplied to a logic circuit of the DDI is required, based on determining that a change to the level of the first logic voltage is required, transmitting a logic voltage setting command to a power management integrated circuit (PMIC), and receiving, from the PMIC, a second logic voltage having a level different from the first logic voltage and corresponding to the logic voltage setting command.

ELECTRONIC APPARATUS FOR DISPLAYING 3D IMAGE AND OPERATING METHOD THEREOF (18137847)

Inventor Kyungmin LIM

Brief explanation

This abstract describes an electronic device and its method of operation. The device includes a display panel, memory, and processor. The processor takes an input image with two areas, and creates a calibration map that assigns a depth value to each area. This calibration map is then applied to the input image to generate an output image with two corresponding areas. The output image is displayed on the display panel, with the depth values converted to match the panel.

Abstract

An electronic apparatus and an operating method thereof are provided. The electronic apparatus includes a display panel, a memory, and a processor. The processor obtains an input image including a first area and a second area, generates a calibration map that allocates, to the first area, a first calibration value for representing a first depth value and allocates, to the second area, a second calibration value for representing a second depth value, applies the calibration map to the input image to generate an output image including a first output area and a second output area, and displays the output image on the display panel. The first output area has a depth value obtained by converting the first depth value so as to correspond to the display panel. The second output area has a depth value obtained by converting the second depth value so as to correspond to the display panel.

ELECTRONIC DEVICE AND CONTROL METHOD THEREOF (18191448)

Inventor Jihwan LEE

Brief explanation

This abstract describes an example electronic device and a control method for the device. The device includes a memory that stores information about different intonation templates, which are generated by training a template generator using various voice signals. These templates represent the intonations of the voice signals. The device also includes a processor that, when a voice signal is received, determines the user's intention behind the voice signal and generates a response text based on the voice signal and the user's intention. The processor then identifies an intonation template that corresponds to the response text using an intonation classifier. The intonation information corresponding to the identified template is obtained using an intonation encoder. Finally, a voice synthesis module generates an output voice signal by combining the response text and the intonation information.

Abstract

An example electronic device and an example control method thereof are provided. The example electronic device may include: a memory configured to store information about a plurality of intonation templates, which are obtained by training an intonation template generator based on a plurality of voice signals and represent intonations of the plurality of voice signals; and a processor configured to, when a voice signal is received, obtain information about a user’s intention corresponding to the voice signal, obtain first text to respond to the voice signal, based on the voice signal and the information about the user’s intention, identify an intonation template corresponding to the first text based on the information about the plurality of intonation templates by inputting information about the first text to an intonation classifier, obtain intonation information corresponding to the identified intonation template by inputting information about the identified intonation template to the intonation encoder, and obtain an output voice signal corresponding to text by inputting the first text and the intonation information to a voice synthesis module.

BANDWIDTH EXTENSION AND SPEECH ENHANCEMENT OF AUDIO (18208628)

Inventor Pavel Konstantinovich Andreev

Brief explanation

This abstract describes a system, apparatus, and method for audio processing. It involves several operations such as obtaining an input audio waveform, converting it into a mel-spectrogram using a short-time Fourier transform (STFT), and then improving the mel-spectrogram by removing noise or restoring high-frequency components using two-dimensional Unet convolutional blocks. The updated mel-spectrogram is then converted back into an audio waveform and corrected in both the time and frequency domains to remove artifacts or noise. The corrected audio waveform is further processed using a one-dimensional convolutional layer, and the final output is provided in both the time and frequency domains.

Abstract

There is provided a system, apparatus and a method for audio processing. The operations include obtaining an input audio waveform, obtaining a mel-spectrogram by performing a short-time Fourier transform (STFT) operation on the input audio waveform, obtaining an updated mel-spectrogram by at least one or removing noise from the mel-spectrogram or restoring high frequency components by applying two-dimensional Unet convolutional blocks to the mel-spectrogram, converting the updated mel-spectrogram to a converted audio waveform in a waveform domain, correcting the converted audio waveform in a time domain, correcting the converted audio waveform in a frequency domain to remove artifacts or noise, processing the corrected audio waveform corrected in the time domain and corrected in the frequency domain with an one-dimensional convolutional layer, and outputting the processed audio waveform in the time domain and in the frequency domain.

SEMICONDUCTOR DEVICES CAPABLE OF PERFORMING WRITE TRAINING WITHOUT READ TRAINING, AND MEMORY SYSTEM INCLUDING THE SAME (18160597)

Inventor Taeyoung Oh

Brief explanation

This abstract describes a semiconductor device that has an input/output interface with multiple pins for data input/output and a pin for receiving a write clock signal from a memory controller. During a write training operation, the device receives write training data from the memory controller through one pin and sends the result values of the write training back to the memory controller through other pins. The write training is performed by the device using the write clock signal and the write training data.

Abstract

A semiconductor device includes an input/output interface with a first data input/output pin, a plurality of second data input/output pins, and a write clock signal pin, which is configured to receive a write clock signal from a memory controller. The first data input/output pin is configured to receive write training data from the memory controller during a write training operation, and the plurality of second data input/output pins feed result values of the write training to the memory controller. This write training is performed by the semiconductor device using the write clock signal and the write training data.

SEMICONDUCTOR MEMORY DEVICE AND MEMORY SYSTEM INCLUDING THE SAME (17885081)

Inventor Taeyoung OH

Brief explanation

This abstract describes a semiconductor memory device that includes two main circuits: a row hammer management circuit and a refresh control circuit. 

The row hammer management circuit keeps track of the number of times each memory cell row is accessed and stores this count data in count cells for each row. It also has a hammer address queue that stores addresses of memory cells that are being accessed frequently. When the number of these candidate hammer addresses reaches a certain threshold (second number), it changes the logic level of an error signal sent to the memory controller. When the number of candidate hammer addresses reaches another threshold (first number), it outputs one of the candidate addresses as a hammer address.

The refresh control circuit is responsible for performing a hammer refresh operation on memory cell rows that are physically adjacent to the memory cell row corresponding to the hammer address. This operation helps prevent the row hammer effect, which is a phenomenon where repeated accessing of certain memory cells can cause data corruption in nearby cells.

In summary, this memory device has a circuit that keeps track of frequently accessed memory cell rows and triggers a refresh operation on neighboring rows to prevent data corruption.

Abstract

A semiconductor memory device includes a row hammer management circuit and a refresh control circuit. The row hammer management circuit counts the number of times of access on each memory cell row to store the counted values in count cells of each memory cell row as count data. A hammer address queue in the row hammer management circuit stores candidate hammer addresses, which are intensively accessed, in response to a number of the candidate hammer addresses reaching a second number, transitions a logic level of an error signal provided to the memory controller, and, in response to the number of the candidate hammer addresses reaching the first number, outputs one of the candidate hammer addresses as a hammer address. The refresh control circuit performs a hammer refresh operation on victim memory cell rows which are physically adjacent to a memory cell row corresponding to the hammer address.

SUBSTRATE PROCESSING METHOD (17994181)

Inventor MINJUNG KIM

Brief explanation

The abstract describes a method for processing a substrate. The method involves three steps: first, a silicon film is formed on the substrate. Then, the silicon film is irradiated with microwaves. Finally, the silicon film is soaked in liquid heavy water.

Abstract

A substrate processing method includes; forming a silicon film on a substrate, irradiating the silicon film with microwaves, and soaking the silicon film in liquid heavy water.

SEMICONDUCTOR CARRIER STORAGE SYSTEM, SEMICONDUCTOR FABRICATION SYSTEM INCLUDING THE SAME, AND SEMICONDUCTOR FABRICATION METHOD USING THE SAME (17972187)

Inventor Youngwook KIM

Brief explanation

The abstract describes a semiconductor carrier storage system used in semiconductor fabrication processes. The system includes storage ports for holding semiconductor carriers, a shuttle rail for moving carriers horizontally, an internal carrier shuttle that transfers carriers to the storage ports, and an upper transport for receiving carriers from an overhead hoist transport. The internal carrier shuttle consists of a shuttle body, a transfer wheel, a gripper for holding carriers, and a hoist for vertically moving the gripper.

Abstract

Disclosed are semiconductor carrier storage systems, semiconductor fabrication systems including the same, and/or semiconductor fabrication methods using the same. The semiconductor carrier storage system comprises storage ports each of which accommodates a semiconductor carrier, a shuttle rail that extends in a horizontal direction on a side of the storage ports, an internal carrier shuttle that moves along the shuttle rail and transfers a semiconductor carrier to each of the storage ports, and an upper transport that receives the semiconductor carrier from an overhead hoist transport (OHT). The internal carrier shuttle includes a shuttle body coupled to the shuttle rail, a transfer wheel that connects the shuttle body to the shuttle rail, a gripper that holds the semiconductor carrier, and a hoist that vertically extends between the shuttle body and the gripper and drives the gripper to vertically move.

INTEGRATED CIRCUIT DEVICES INCLUDING A PARAMETER MEASURING STRUCTURE AND METHODS OF FORMING THE SAME (17837453)

Inventor BYOUNGHAK HONG

Brief explanation

The abstract describes integrated circuit devices that consist of a cell transistor and a parameter measuring structure. The cell transistor is located on one side of a substrate structure, while the parameter measuring structure includes two contact structures that extend through the substrate structure. The second side of the substrate structure exposes parts of the contact structures.

Abstract

Integrated circuit devices may include a cell transistor and a parameter measuring structure (e.g., a resistance measuring structure). The cell transistor may be on a first surface of a substrate structure, which is opposite a second surface thereof. The parameter measuring structure may include first and second contact structures that extend through the substrate structure. The second surface of the substrate structure may expose respective portions of the first and second contact structures.

SEMICONDUCTOR DEVICE (18127895)

Inventor Sang Cheol NA

Brief explanation

The abstract describes a semiconductor device that includes various components such as a substrate, active pattern, gate electrode, source/drain region, interlayer insulating layer, sacrificial layer, lower wiring layer, through via trench, through via, recess, and through via insulating layer. These components are arranged in a specific configuration to enable the device to function effectively.

Abstract

A semiconductor device is provided. The semiconductor device includes: a first substrate; an active pattern extending on the first substrate; a gate electrode extending on the active pattern; a source/drain region on the active pattern; a first interlayer insulating layer on the source/drain region; a sacrificial layer on the first substrate; a lower wiring layer on a lower surface of the sacrificial layer; a through via trench extending to the lower wiring layer by passing through the first interlayer insulating layer and the sacrificial layer in a vertical direction; a through via inside the through via trench and connected to the lower wiring layer; a recess inside the sacrificial layer and protruding from a sidewall of the through via trench in the second horizontal direction; and a through via insulating layer extending along the sidewall of the through via trench and into the recess.

SEMICONDUCTOR DEVICE AND MASSIVE DATA STORAGE SYSTEM INCLUDING THE SAME (18334546)

Inventor Sungmin HWANG

Brief explanation

This abstract describes a semiconductor device that includes various components such as lower circuit patterns, lower bonding patterns, upper bonding patterns, a passive device, a gate electrode structure, a channel, and an upper substrate. The lower circuit patterns are located on a lower substrate and are electrically connected to the lower bonding patterns, which are made of a conductive material. The upper bonding patterns are on top of the lower bonding patterns and also made of a conductive material. The passive device is placed on the upper bonding patterns and is in contact with one of them. The gate electrode structure is positioned on the passive device and consists of gate electrodes that are spaced apart from each other in one direction and extend in another direction. The length of the gate electrodes in the second direction increases gradually from the bottom to the top in a stepwise manner. A channel is formed through at least a part of the gate electrode structure. Finally, an upper substrate is placed on top of the channel.

Abstract

A semiconductor device includes lower circuit patterns on a lower substrate; lower bonding patterns on the lower circuit patterns, the lower bonding patterns including a conductive material and being electrically connected to the lower circuit patterns; upper bonding patterns on and contacting the lower bonding patterns, and including a conductive material; a passive device on the upper bonding patterns, and including a conductive material and contacting one of the upper bonding patterns; a gate electrode structure on the passive device, and including gate electrodes spaced apart from each other in a first direction, each of which extends in a second direction, and extension lengths in the second direction of the gate electrodes increasing from a lowermost level toward an uppermost level in a stepwise manner; a channel extending through at least a portion of the gate electrode structure; and an upper substrate on the channel.

SEMICONDUCTOR DEVICE (18086340)

Inventor JONGJIN LEE

Brief explanation

The abstract describes a semiconductor device that includes a substrate with transistors and multiple layers of insulating material. The device also has two interconnection lines, each consisting of a barrier pattern, a liner, and a conductive pattern. The height difference between the top surface of the conductive pattern and the lowermost portion of the liner is greater in the first interconnection line compared to the second interconnection line.

Abstract

Provided is a semiconductor device including a substrate including an active region, transistors on the substrate, a first interlayer insulating layer and a second interlayer insulating layer on the transistors, a first interconnection line in an upper portion of the first interlayer insulating layer, and a second interconnection line in the second interlayer insulating layer, wherein the first interconnection line includes a first barrier pattern, a first liner, and a first conductive pattern, wherein the second interconnection line includes a second barrier pattern, a second liner, and a second conductive pattern, wherein first height between an uppermost portion of a top surface of the first conductive pattern and a lowermost portion of a top surface of the first liner is greater than a second height between an uppermost portion of a top surface of the second conductive pattern and a lowermost portion of a top surface of the second liner.

REVERSED HIGH ASPECT RATIO CONTACT (HARC) STRUCTURE AND PROCESS (17887203)

Inventor Buhyun HAM

Brief explanation

The abstract describes a semiconductor chip architecture that includes several layers and structures. It starts with a wafer, on which a front-end-of-line (FEOL) layer is located on one side. This FEOL layer consists of a semiconductor device and an interlayer dielectric (ILD) structure on top of the device. The wafer also has a shallow trench isolation (STI) structure. On top of the FEOL layer, there is a middle-of-line (MOL) layer, which includes a contact and a via connected to the contact. An insulating layer is present on the same side of the wafer, adjacent to the via in a horizontal direction. Additionally, there is a power rail that goes through the wafer from the opposite side, and the via extends through the ILD structure, STI structure, and wafer in a vertical direction to make contact with the power rail.

Abstract

Provided is a semiconductor chip architecture including a wafer, a front-end-of-line (FEOL) layer on a first side of the wafer, the FEOL layer including a semiconductor device and an interlayer dielectric (ILD) structure on the semiconductor device on the first side of the wafer, a shallow trench isolation (STI) structure in the wafer, and the wafer, a middle-of-line (MOL) layer provided on the first FEOL layer, the MOL layer including a contact and a via connected to the contact, an insulating layer on the first side of the wafer and adjacent to the via in a horizontal direction, a power rail penetrating the wafer from a second side of the wafer opposite to the first side, wherein the via extends through the ILD structure, the STI structure, and the wafer in a vertical direction to contact the power rail.

SEMICONDUCTOR PACKAGE HAVING AN INTERPOSER AND METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE (18326325)

Inventor YANGGYOO JUNG

Brief explanation

The abstract describes a semiconductor package that includes a package substrate and an interposer. The interposer has a semiconductor substrate with a wiring layer on top, which contains multiple wirings. There are redistribution wiring pads on the wiring layer that are connected to the wirings. Bonding pads are placed on the redistribution wiring pads. An insulation layer pattern is also present on the wiring layer, exposing a part of the bonding pad. The interposer also has two semiconductor devices, which are positioned apart from each other and connected by the wirings.

Abstract

A semiconductor package includes a package substrate. An interposer is disposed on the package substrate. The interposer includes a semiconductor substrate, a wiring layer disposed on an upper surface of the semiconductor substrate and having a plurality of wirings therein, redistribution wiring pads disposed on the wiring layer and electrically connected to the wirings, bonding pads disposed on the redistribution wiring pads, and an insulation layer pattern disposed on the wiring layer and exposing at least a portion of the bonding pad, and first and second semiconductor devices disposed on the interposer. The first and second semiconductor devices are spaced apart from each other and are electrically connected to each other by at least one of the wirings.

SEMICONDUCTOR DEVICE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME (18328322)

Inventor YEONGKWON KO

Brief explanation

This abstract describes a semiconductor device that includes a semiconductor substrate with two opposing surfaces. On one surface, there are multiple semiconductor elements arranged in a specific area. The other surface is divided into two regions: one that overlaps with the area where the semiconductor elements are located, and another region surrounding it. An insulating protective layer is applied to the second surface of the substrate, and it includes an edge pattern in the surrounding region. This edge pattern can have a thinner portion compared to the center portion of the protective layer in the overlapping region, or it can have an open region that exposes the second surface of the substrate. Additionally, there is a connection pad located on the center portion of the protective layer, which is electrically connected to the semiconductor elements.

Abstract

A semiconductor device includes a semiconductor substrate having a first surface and a second surface opposing each other, a plurality of semiconductor elements disposed on the first surface in a device region, an insulating protective layer, and a connection pad. The second surface is divided into a first region overlapping the device region, and a second region surrounding the first region. The insulating protective layer is disposed on the second surface of the semiconductor substrate, and includes an edge pattern positioned in the second region. The edge pattern includes a thinner portion having a thickness smaller than a thickness of a center portion of the insulating protective layer positioned in the first region and/or an open region exposing the second surface of the semiconductor substrate. The connection pad is disposed on the center portion of the insulating protective layer and is electrically connected to the semiconductor elements.

SEMICONDUCTOR PACKAGE (18131258)

Inventor Junghoon Kang

Brief explanation

The abstract describes a semiconductor package that consists of a layer that encapsulates a semiconductor chip, and another layer called the redistribution level layer that is placed on top of the encapsulation layer. The redistribution level layer includes a redistribution layer and a redistribution insulating layer that isolates the redistribution layer. The abstract also mentions the presence of a laser mark area on the redistribution layer and the redistribution insulating layer, which is made up of multiple mesh-like redistribution insulating patterns arranged on a plane and surrounded by the redistribution layer. Additionally, there is a laser mark insulating layer on top of the redistribution layer and the redistribution insulating layer, which exposes the redistribution layer and the mesh-like redistribution insulating patterns in the laser mark area.

Abstract

A semiconductor package includes an encapsulation layer encapsulating at least one semiconductor chip, and a redistribution level layer disposed on the encapsulation layer. The redistribution level layer includes a redistribution layer and a redistribution insulating layer insulating the redistribution layer, a laser mark area is disposed on the redistribution layer and the redistribution insulating layer, and the redistribution insulating layer of the laser mark area comprises a plurality of mesh-type redistribution insulating patterns arranged apart from each other on a plane and surrounded by the redistribution layer. The redistribution level layer includes a laser mark insulating layer located on the redistribution layer and the redistribution insulating layer, wherein the laser mark insulating layer includes a laser mark exposing the redistribution layer and the mesh-type redistribution insulating patterns in the laser mark area.

SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME (18204505)

Inventor YOUNGWOO PARK

Brief explanation

The abstract describes a semiconductor package that includes multiple layers to protect and enclose semiconductor chips. The package includes a substrate, a first semiconductor chip, an inner mold layer, an inner shielding layer, a second semiconductor chip stack, an outer mold layer, and an outer shielding layer. The inner and outer shielding layers are made of a conductive material and the inner shielding layer is connected to a ground pad on the substrate.

Abstract

A semiconductor package is disclosed. The semiconductor package may include a substrate, a first semiconductor chip on the substrate, an inner mold layer provided on the substrate to at least partially enclose the first semiconductor chip, an inner shielding layer provided on the substrate to at least partially enclose the inner mold layer, a second semiconductor chip stack on the inner shielding layer, an outer mold layer provided on the substrate to at least partially enclose the inner shielding layer and the second semiconductor chip stack, and an outer shielding layer at least partially enclosing the outer mold layer. Each of the inner and outer shielding layers may include a conductive material, and the inner shielding layer may be electrically connected to a ground pad of the substrate.

SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME (17984446)

Inventor Sangho CHA

Brief explanation

The abstract describes a semiconductor device and its fabrication method. The device includes a pad on a semiconductor chip, a protective layer with an opening exposing part of the pad's top surface, and a bump structure connecting to the pad. The bump structure consists of a metal layer on the pad and a solder ball on top. The width of the metal layer is approximately 0.85 to 0.95 times the width of the opening.

Abstract

Disclosed are semiconductor devices and their fabrication methods. The semiconductor device comprises a pad on a semiconductor chip, a protective layer on the semiconductor chip and having an opening that exposes a portion of a top surface of the pad, and a bump structure electrically connected to the pad. The bump structure includes a metal layer on the pad and a solder ball on the metal layer. A first width of the metal layer is about 0.85 times to about 0.95 times a second width of the opening.

SEMICONDUCTOR PACKAGE (18210132)

Inventor Sanguk KIM

Brief explanation

This abstract describes a semiconductor package that consists of various components such as a package substrate, bumps, a semiconductor chip, connection patterns, molding, warpage control layer, and insulating layers. The package is designed to control warpage and provide connectivity between different components. The abstract mentions the specific openings in the insulating layers that expose the warpage control layer and connection patterns.

Abstract

A semiconductor package includes a package substrate, first and second bumps on a lower surface of the package substrate, a semiconductor chip on an upper surface of the package substrate, first and second connection patterns on the upper surface of the package substrate, a molding on the upper surface of the package substrate and covering the semiconductor chip, a warpage control layer on the molding, an upper insulating layer on the warpage control layer, a first opening passing through the upper insulating layer and exposing an upper surface of the warpage control layer, a second opening overlapping the first opening in a top view, the second opening passing through the warpage control layer and exposing the first connection pattern, and a third opening passing through the upper insulating layer and exposing the second connection pattern.

VERTICAL PN CONNECTION IN MULTI-STACK SEMICONDUCTOR DEVICE (17841299)

Inventor WookHyun KWON

Brief explanation

The abstract describes a multi-stack semiconductor device that consists of a substrate and two field-effect transistors. The lower transistor has a lower channel structure, a lower gate structure, and two source/drain regions. The upper transistor is placed on top of the lower transistor and has an upper channel structure, an upper gate structure, and two source/drain regions positioned vertically above the source/drain regions of the lower transistor. The first source/drain region is connected to either a positive or negative voltage source, while the third source/drain region is connected to the opposite voltage source. Additionally, the top portion of the second source/drain region and the bottom portion of the fourth source/drain region are connected to each other.

Abstract

A multi-stack semiconductor device includes: a substrate; a lower field-effect transistor including a lower channel structure, a lower gate structure surrounding the lower channel structure, and 1and 2source/drain regions; and an upper field-effect transistor, on the lower field-effect transistor, including an upper channel structure, an upper gate structure surrounding the upper channel structure, and 3and 4source/drain regions vertically above the 1and 2source/drain regions, respectively, wherein the 1source/drain region is connected to one of a positive voltage source and a negative voltage source, and the 3source/drain region is connected to the other of the positive voltage source and the negative voltage source, and wherein a top portion of the 2source/drain region and a bottom portion the 4source/drain region are connected to each other.

CHIP-ON-FILM SEMICONDUCTOR PACKAGE AND DISPLAY APPARATUS INCLUDING THE SAME (18092241)

Inventor Seunghyun CHO

Brief explanation

The abstract describes a semiconductor package called chip-on-film (COF) that consists of a main film substrate and at least two sub-modules. The main film substrate has two module attachment regions where the sub-modules are attached. Each sub-module includes a sub-film substrate and a semiconductor chip mounted on it. The main film substrate and the sub-film substrate are connected by connection conductive layers, which allow electrical connection between the main film substrate and the sub-modules.

Abstract

A chip-on-film (COF) semiconductor package includes: a main film substrate having at least two module attachment regions spaced apart from each other; at least two sub-modules respectively attached to the at least two module attachment regions and spaced apart from each other on the main film substrate, wherein each of the at least two sub-modules comprise a sub-film substrate and a semiconductor chip mounted on the sub-film substrate; and at least two connection conductive layers provided between the main film substrate and the sub-film substrate, which is included in each of the at least two sub-modules, and electrically connecting the main film substrate to the at least two sub-modules.

IMAGE SENSOR (18103582)

Inventor Jung Hye KIM

Brief explanation

The abstract describes an image sensor that consists of a first substrate with a photoelectric conversion layer on one side. The sensor also includes multiple pixel regions separated by a pixel isolation pattern. Within one of these pixel regions, there are three transistors that share a common source/drain region.

Abstract

An image sensor is provided. The An image sensor includes: a first substrate including a first side and a second side opposite to each other, and an active region; a plurality of pixel regions, each including a photoelectric conversion layer on the first side of the first substrate; a pixel isolation pattern which separates the plurality of pixel regions from each other and extends along a direction perpendicular to the first side of the first substrate; and a first transistor, a second transistor and a third transistor corresponding to a first pixel region of the plurality of pixel regions. The first transistor, the second transistor and the third transistor share a common source/drain region inside the active region.

METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE, SEMICONDUCTOR PACKAGE, AND IMAGING APPARATUS (17746290)

Inventor Wenjun WANG

Brief explanation

The abstract describes a semiconductor package and a method of manufacturing it, as well as an imaging apparatus. The method involves preparing a substrate with a first connection region and a sensor chip with a second connection region. The first connection region is coated with a bonding layer consisting of multiple layers of nano low-melting-point metal materials with different melting point gradients. The same is done for the second connection region on the sensor chip. The substrate and sensor chip are then aligned and tightly compressed, causing the first and second bonding layers to form a composite structure. This composite structure is then treated at a specific temperature, pressure, and with ultrasonic waves to form a eutectic, which is a mixture of metals with a lower melting point than the individual metals.

Abstract

A semiconductor package and a method of manufacturing the same, and an imaging apparatus are provided. The method includes preparing a substrate having a first connection region and a sensor chip having a second connection region. A first bonding layer including multi-layer nano low-melting-point metal materials with different melting point gradients is provided on the first connection region. A second bonding layer including multi-layer nano low-melting-point metal materials with different melting point gradients is provided on the second connection region. The substrate and the sensor chip are overlapped to align and tightly compress the first and second bonding layers, to obtain a composite structure. The composite structure is treated at a temperature of 30 to 180° C., under a pressure of 1 to 8 MPa, and with an ultrasonic of 10 to 30 kHz to form the first and second bonding layers into a eutectic.

IMAGE SENSORS INCLUDING NANOROD PIXEL ARRAY, METHODS OF MANUFACTURING IMAGE SENSORS, AND ELECTRONIC DEVICES INCLUDING IMAGE SENSORS (18111375)

Inventor Jeongyub LEE

Brief explanation

The abstract describes an image sensor that consists of multiple layers of electrodes and a layer of nanorod pixels. The nanorod pixels are smaller than 1 μm in size and are made up of a compound semiconductor. Each nanorod pixel has three layers: a first layer doped with a specific material, a second undoped layer, and a third layer doped with a different material.

Abstract

Provided is an image sensor including a plurality of first electrode layers spaced apart from each other, a second electrode layer opposite to the plurality of first electrode layers, and a pixel layer provided between the plurality of first electrode layers and the second electrode layer, the pixel layer including a plurality of nanorod pixels, wherein a size of each nanorod pixel among the plurality of nanorod pixels is less than 1 μm, wherein the plurality of nanorod pixels include a first pixel including a compound semiconductor, and wherein the first pixel includes a first compound semiconductor layer doped with a first dopant, a second compound semiconductor layer that is undoped, and a third compound semiconductor layer doped with a second dopant different from the first dopant.

SEMICONDUCTOR DEVICES AND METHODS FOR FABRICATING THE SAME (18056736)

Inventor Bong Kwan Baek

Brief explanation

This abstract describes semiconductor devices that have been improved in terms of performance and reliability. These devices have an active pattern that extends in a certain direction. On this active pattern, there are gate structures that are spaced apart from each other. Additionally, there is a source/drain pattern and a source/drain contact on the active pattern. The contact liner extends along the sidewall of the source/drain contacts. What sets these devices apart is the carbon concentration of the contact liner. At different points of the contact liner, the carbon concentration varies. The first point is at a lower height from the upper surface of the active pattern compared to the second point. This difference in carbon concentration and height contributes to the improved performance and reliability of these semiconductor devices.

Abstract

Semiconductor devices with improved performance and reliability and methods for forming the same are provided. The semiconductor devices include an active pattern extending in a first direction, gate structures spaced apart from each other in the first direction on the active pattern, a source/drain pattern on the active pattern, a source/drain contact on the source/drain pattern, and a contact liner extending along a sidewall of the source/drain contacts. A carbon concentration of the contact liner at a first point of the contact liner is different from a carbon concentration of the contact liner at a second point of the contact liner, and the first point is at a first height from an upper surface of the active pattern, the second point is at a second height from the upper surface of the active pattern, and the first height is smaller than the second height.

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME (18050684)

Inventor Namkyu CHO

Brief explanation

This abstract describes a semiconductor device that consists of a substrate with a first active pattern. On top of this pattern, there is a first channel pattern, which is made up of three semiconductor patterns stacked vertically and spaced apart from each other. These semiconductor patterns are connected to a first source/drain pattern, and there is a gate electrode on top of all three semiconductor patterns.

The first source/drain pattern has three protrusions, each protruding towards one of the semiconductor patterns. The second protrusion is wider than the first protrusion, and the third protrusion is wider than the second protrusion.

Abstract

A semiconductor device includes a substrate including a first active pattern, a first channel pattern on the first active pattern, the first channel pattern including first, second, and third semiconductor patterns spaced apart from one another and vertically stacked, a first source/drain pattern connected to the first to third semiconductor patterns, and a gate electrode on the first to third semiconductor patterns. The first source/drain pattern includes a first protrusion protruding toward the first semiconductor pattern, a second protrusion protruding toward the second semiconductor pattern, and a third protrusion protruding toward the third semiconductor pattern. A width of the second protrusion is greater than a width of the first protrusion. A width of the third protrusion is greater than the width of the second protrusion.

SEMICONDUCTOR DEVICE (18201308)

Inventor Ryong HA

Brief explanation

The abstract describes a semiconductor device that includes various patterns and layers. It mentions an active pattern, a channel pattern, a source/drain pattern, a gate electrode, and a gate spacer. The device also includes a buffer layer that covers the inner sides of a recess in the active pattern. The abstract mentions that the outer and inner side surfaces of the buffer layer are curved surfaces that are convexly curved towards the closest gate electrode.

Abstract

A semiconductor device including an active pattern extending in a first direction; a channel pattern on the active pattern and including vertically stacked semiconductor patterns; a source/drain pattern in a recess in the active pattern; a gate electrode on the active pattern and extending in a second direction crossing the first direction, the gate electrode surrounding a top surface, at least one side surface, and a bottom surface of each of the semiconductor patterns; and a gate spacer covering a side surface of the gate electrode and having an opening to the semiconductor patterns, wherein the source/drain pattern includes a buffer layer covering inner sides of the recess, the buffer layer includes an outer side surface and an inner side surface, which are opposite to each other, and each of the outer and inner side surfaces is a curved surface that is convexly curved toward a closest gate electrode.

SEMICONDUCTOR DEVICE (18189621)

Inventor Sungil Park

Brief explanation

This abstract describes a semiconductor device that consists of a semiconductor body with two surfaces. The body includes different regions with varying conductivity types. There is a first well region with one conductivity type, and two other well regions with the opposite conductivity type, separated by the first well region. The first well region also contains several doped regions that are spaced apart from each other in a different direction. Additionally, there are two other doped regions adjacent to the second and third well regions. The second surface of the semiconductor body includes the bottom surfaces of all these regions.

Abstract

A semiconductor device includes a semiconductor body having first and second surfaces opposite to each other. The semiconductor body includes a first well region having a first conductivity type, second and third well regions spaced apart from each other in a first direction with the first well region interposed therebetween and having a second conductivity type, first doped regions spaced apart from each other in a second direction intersecting the first direction in the first well region, a second doped region, which is adjacent to the second well region and has the second conductivity type, and a third doped region, which is adjacent to the third well region and has the second conductivity type. The second surface of the semiconductor body includes bottom surfaces of the first to third well regions, the plurality of first doped regions, the second doped region, and the third doped region.

SEMICONDUCTOR DEVICE (18204550)

Inventor Sungmin KIM

Brief explanation

The abstract describes a semiconductor device and a method of manufacturing it. The device consists of a first semiconductor pattern on a substrate, which has a lower channel. On top of the first semiconductor pattern, there is a second semiconductor pattern that is spaced apart from the first pattern in a vertical direction. The second pattern has an upper channel that extends vertically. The device also includes a gate electrode that covers the lower channel and surrounds the upper channel. Additionally, there are source/drain patterns on opposite sides of the upper channel. The substrate and the first semiconductor pattern have a doping concentration of 10/cm or less.

Abstract

A semiconductor device and a method of manufacturing a semiconductor device, the device including a first semiconductor pattern on a substrate, the first semiconductor pattern including a lower channel; a second semiconductor pattern on the first semiconductor pattern and spaced apart from the first semiconductor pattern in a vertical direction, the second semiconductor pattern including an upper channel extending in the vertical direction; a gate electrode covering the lower channel and surrounding the upper channel; and source/drain patterns on opposite sides of the upper channel, wherein the substrate and the first semiconductor pattern have a doping concentration of 10/cm or less.

ELECTRODE STRUCTURE AND METHOD OF MANUFACTURING THE SAME, AND SECONDARY BATTERY INCLUDING THE ELECTRODE STRUCTURE (18210170)

Inventor Hwiyeol PARK

Brief explanation

The abstract describes an electrode structure that consists of a base layer and multiple active material plates. The base layer contains a first active material, while the active material plates on the surface of the base layer are made of a second active material. The active material density of the base layer is lower than that of the active material plates.

Abstract

An electrode structure includes a base layer including a first active material, and a plurality of active material plates on a first surface of the base layer and spaced apart from one another, the plurality of active material plates including a second active material. An active material density of the base layer is less than an active material density of an active material plate of the plurality of active material plates.

ELECTRONIC DEVICE COMPRISING AN ANTENNA (18210975)

Inventor Jongmin KIM

Brief explanation

The abstract describes an electronic device that includes a camera module, a metal structure, two antennas, a switching module, and at least one processor. The device is capable of transmitting signals in a specific frequency band. The switching module adjusts the impedance of the device using lumped elements, and the processor controls the switching module based on the transmission power of the first antenna. When the transmission power reaches a certain level, the switching module connects the metal structure to the ground.

Abstract

An electronic device according to an embodiment may include a camera module, a metal structure, a first antenna adjacent to the camera module, a second antenna spaced from the camera module, a switching module electrically connected to the metal structure, including at least one lumped element, and adjusting an impedance by using the at least one lumped element, and at least one processor. The at least one processor is configured to transmit a signal in a first frequency band by feeding the first antenna and control the switching module such that the switching module has a first impedance corresponding to the first frequency band and electrically connects the metal structure and the ground when the transmission power of the first antenna is equal to or more than the designated value.

ELECTRONIC DEVICE USING HINGE STRUCTURE AS ANTENNA (18328176)

Inventor Kyungmoon SEOL

Brief explanation

This abstract describes an electronic device that includes a housing, a hinge with a conductive part, and a wireless communication circuit. The housing has two frames, each with a conductive part. In the first state, the wireless communication circuit transmits or receives a signal of a specific frequency band using the conductive parts of the frames. In the second state, the wireless communication circuit uses the conductive parts of the frames and the conductive part of the hinge to transmit or receive the same signal.

Abstract

An electronic device is provided, The electronic device includes a housing, a hinge including a conductive portion, at least one contact electrically connecting the conductive portion and at least one of a first frame and second frame of the housing, and a wireless communication circuit. The first frame includes a first conductive portion. The second frame includes a second conductive portion. In a first state, the wireless communication circuit at least one of transmits or receives a signal of a first frequency band, based on the first conductive portion and the second conductive portion. In a second state, the wireless communication circuit at least one of transmits or receives the signal of the first frequency band, based on the first conductive portion and the conductive portion.

ELECTRONIC DEVICE COMPRISING ANTENNA (18335760)

Inventor Jaewoong JEON

Brief explanation

The abstract describes an electronic device that consists of two printed circuit boards (PCBs) separated by an interposer. The interposer acts as a shield for electronic components and is made up of a conductive ground portion and a non-conductive portion with a dielectric material. The second PCB is connected to an antenna through a conductive connecting member, and the first PCB is connected to a wireless communication circuit. The wireless communication circuit enables the device to transmit and receive signals within a specific frequency range by providing power to the antenna through the conductive via.

Abstract

An electronic device according to various embodiments comprises: a first printed circuit board (PCB); a second PCB disposed to be spaced apart from the first PCB; an interposer encompassing the space between the first PCB and the second PCB; an antenna; a conductive connecting member comprising a conductive material electrically connecting the second PCB and the antenna; and a wireless communication circuit electrically connected to the first PCB, wherein the interposer includes a ground portion configured to provide shielding for least one electronic component disposed in the electronic device, and a non-conductive portion positioned to be adjacent the ground portion and including a dielectric material, the non-conductive portion of the interposer includes a conductive via configured to connect the first PCB and the second PCB, and the wireless communication circuit is configured to transmit and/or receive a signal having a designated frequency band by feeding electricity to the antenna through the conductive via.

ELECTRONIC APPARATUS COMPRISING ANTENNA (18201382)

Inventor Sungsoo KIM

Brief explanation

This abstract describes an electronic device that has a flexible display and a key button. The key button is located in a specific area on one side of the device and includes a protrusion that extends inside the device. There is also an antenna structure inside the device, positioned with respect to the key button area. The device has a housing that consists of two parts, with a connection part in between. The second part is rotatably connected to the first part. The antenna structure includes a dome switch located above a substrate, corresponding to the protrusion of the key button. There are also multiple conductive patches on a conductive layer of the substrate, and the dome switch is positioned between these patches.

Abstract

An electronic apparatus having a housing, a flexible display, and a key button which is arranged in a first area on a side of a first part is provided. The key button includes at least one protrusion extending toward the inside of the first part and an antenna structure arranged on the inside of the first part with respect to the first area. The housing includes the first part, a second part, and a connection part arranged between the first part and the second part, the second part being rotatably coupled to the first part through the connection part. The antenna structure includes a dome switch arranged above a substrate at a position corresponding to the at least one protrusion, and a plurality of conductive patches provided on a conductive layer of the substrate. The dome switch may be arranged at the corresponding position between the plurality of conductive patches.

METHOD FOR CONTROLLING BEAM USING LENS IN WIRELESS COMMUNICATION SYSTEM (18335517)

Inventor Seungtae KO

Brief explanation

The abstract describes a device used in wireless communication systems called a beamforming device. This device consists of a phased array antenna, wireless communication circuit, and a lens. The lens has two surfaces, one facing the antenna and the other facing the opposite direction. When a beam is emitted from the antenna, it passes through a point on the first surface of the lens and is refracted, or bent, forming a path inside the lens. The beam then continues along this path and is refracted again at a point on the second surface of the lens. The angle at which the beam is refracted at this second point depends on the angle at which the beam was originally emitted from the antenna.

Abstract

A beamforming device in a wireless communication system is provided that includes a phased array antenna, at least one wireless communication circuit, and a lens, wherein the lens comprises a first surface oriented in a first direction, which is the direction toward the phased array antenna, and a second surface oriented in a second direction, which is the opposite direction of the first direction, and a first beam radiated from the phased array antenna is refracted after passing through a first point on the first surface, and forms a first path inside the lens and forms a second path along which the first beam is refracted at a second point on the second surface after passing through the inside of the lens along the first path, wherein the refraction angle at the second point may be formed so as to be dependent on the radiation angle of the first beam.

CONNECTOR INCLUDING CONTACT POINT STRUCTURE (18336272)

Inventor Heekang YUN

Brief explanation

The abstract describes a connector that includes a housing with an accommodation groove. The groove has two guides, a first guide and a second guide, which are spaced apart. A first contact is positioned between the two guides and includes a first bending portion and a second bending portion. The guides are in contact with a header and help guide its position. The first bending portion applies pressure to the header to secure it to the connector. The second bending portion may be in contact with the first bending portion. The abstract concludes by stating that there are other possible embodiments of the connector.

Abstract

A connector according to various embodiments of the present disclosure comprises: a housing; an accommodation groove formed in one portion of the connector; a guide comprising a first guide firmed on the side surface of the accommodation groove and a second guide formed on the side surface of the accommodation groove to be spaced a certain distance from the first guide; and a first contact arranged between the first guide and the second guide, wherein the first contact comprises a first bending portion and a second bending portion. The guide is in contact with a header and guides the position of the header. A first point of the first bending portion is in contact with the header, and as the first bending portion is bent, the first bending portion applies the pressure to the header so that the header is fixed to the connector. A second point of the first bending portion may be in contact with a third point of the second bending portion. Other various embodiments are possible.

DEVICE AND METHOD PROVIDING FEEDBACK IN WIRELESS POWER TRANSFER (18126657)

Inventor HYUNSU KIM

Brief explanation

The abstract describes a system where a first device can wirelessly receive power from a second device. The second device has a resonance circuit with a specific frequency. The first device has its own resonance circuit with the same frequency, a capacitor connected to it, a rectifier to convert the alternating current (AC) voltage at the resonance frequency, and a control circuit. The control circuit determines a specific period of time based on feedback information and applies a first voltage and a higher second voltage alternately to the capacitor during this period. This allows the first device to receive power from the second device in a normal output mode.

Abstract

A first device wirelessly receives power from a second device including a second resonance circuit having a resonance frequency. The first device includes: a first resonance circuit having the resonance frequency, a first capacitor connected to the first resonance circuit at a first node, a rectifier configured to rectify an alternating current (AC) voltage apparent at a first node and oscillating at the resonance frequency, and a control circuit connected to the first capacitor, and configured to determine a first period based on feedback information to be provided to the second device, and alternately apply a first voltage and a second voltage higher than the first voltage to the first capacitor for the first period during a normal output mode.

MOTOR AND CLEANER HAVING THE SAME (18209597)

Inventor Woong HWANG

Brief explanation

This abstract describes a motor and a cleaner that both contain the same motor. The motor consists of a stator, a rotating shaft, a rotor, a housing, a bearing, and a frame. The stator includes a stator core, and the rotating shaft is placed inside the stator. The rotor can rotate around the shaft by interacting with the stator electromagnetically. The housing is designed to hold the stator and the rotor securely. The bearing is connected to the housing and supports the rotation of the rotor. The frame is positioned in the housing and allows for electrical connection between the stator core and the bearing.

Abstract

A motor and a cleaner including the same where the motor includes a stator including a stator including a stator core, a rotating shaft arrangeable inside of the stator, a rotor rotatable about the rotating shaft by electromagnetically interacting with the stator while the rotating shaft is arranged inside the stator, a housing to accommodate the stator and the rotor, a bearing coupleable to the housing so that while the bearing is coupled to the housing, the bearing supports a rotation of the rotor about the rotating shaft while the stator and the rotor are stably accommodated in the housing and a frame to support the bearing in the housing, the frame being positioned in the housing to be in contact with the stator core and the bearing to allow the stator core and the bearing to be electrically connected.

DC-TO-DC CONVERTER WITH PULSE SKIPPING FUNCTION AND ON-TIME CONTROL FUNCTION, AND ELECTRONIC DEVICES INCLUDING THE SAME (18151115)

Inventor Dam YUN

Brief explanation

The abstract describes a DC-to-DC converter that converts a DC voltage from a power line to a desired output voltage. The converter includes two switching circuits that are controlled by pulse control signals. One switching circuit is connected between the power line and the output terminal, while the other is connected between the output terminal and ground.

The converter also includes a pulse control signal generation circuit that receives two input levels: a first level associated with the output voltage and a second level of a reference voltage. If the second level is higher than the first level, the pulse control signal generation circuit generates a first pulse control signal to increase the output voltage. On the other hand, if the second level is lower than the first level, the circuit generates a second pulse control signal.

In summary, the DC-to-DC converter adjusts the output voltage based on the input levels and generates the appropriate pulse control signals to control the switching circuits.

Abstract

Disclosed is a DC-to-DC converter which includes a first switching circuit connected between a power line receiving a DC voltage and an output terminal of the DC-to-DC converter and switched based on a first pulse control signal, a second switching circuit connected between the output terminal and a ground and switched based on a second pulse control signal, a pulse control signal generation circuit that receives a first level of a first voltage associated with an output voltage and a second level of a first reference voltage, wherein, in response to the second level being higher than the first level, the pulse control signal generation circuit is configured to generate the first pulse control signal to increase the output voltage and wherein, in response to the second level being lower than the first level, the pulse control signal generation circuit is configured to generate the second pulse control signal.

COMMUNICATION CIRCUIT INCLUDING AMPLIFIER MODULE, AND ELECTRONIC DEVICE COMPRISING SAME (18334717)

Inventor John MOON

Brief explanation

The abstract describes a communication circuit and an electronic device that includes the communication circuit. The communication circuit consists of an amplifier module with two amplifiers, a first amplifier and a second amplifier, which amplify a signal. There is also a first matching circuit that is located outside the amplifier module and is responsible for matching the impedance between the first amplifier and the second amplifier. The amplifier module has a first terminal for outputting the amplified signal to the outside and a second terminal for inputting a signal to the second amplifier. The first matching circuit can be connected to the amplifier module through the first and second terminals.

Abstract

A communication circuit and an electronic device comprising the communication circuit are provided. The communication circuit includes an amplifier module including a first amplifier and a second amplifier for amplifying a signal amplified by the first amplifier, and a first matching circuit that is disposed outside the amplifier module and performs impedance matching between the first amplifier and the second amplifier, wherein the amplifier module includes a first terminal for outputting, to the outside, the signal amplified by the first amplifier, and a second terminal for a signal that is input to the second amplifier, and the first matching circuit may be connected to the amplifier module via the first terminal and the second terminal.

APPARATUS AND METHOD FOR AMPLIFYING TRANSMISSION/RECEPTION SIGNAL AND CONTROLLING PHASE OF TRANSMISSION/RECEPTION SIGNAL IN WIRELESS COMMUNICATION SYSTEM (18210433)

Inventor Jinhyun KIM

Brief explanation

The abstract describes a communication system, specifically a 5G or pre-5G system, that is designed to provide faster data transmission rates compared to 4G systems like LTE. The system includes two amplifier units, one with a common source structure and cross-coupled capacitors, and the other with a common gate structure. The second amplifier unit is connected to the first amplifier unit and amplifies the signal output from it. The second amplifier unit has four input units, and two of these input units can be connected to the first amplifier unit.

Abstract

The present disclosure relates to a 5generation (5G) or pre-5G communication system for supporting higher data transmission rates than 4generation (4G) communication systems such as long-term evolution (LTE). In a wireless communication system, an apparatus comprises: a first amplifier unit that has a common source structure, includes cross-coupled capacitors, and amplifies an input signal; and a second amplifier unit that has a common gate structure, is connected to the first amplifier unit, and amplifies the signal output from the first amplifier unit, wherein the second amplifier unit includes a first input unit, a second input unit, a third input unit, and a fourth input unit, and two input units among the first input unit, the second input unit, the third input unit, and the fourth input unit may be connected to the first amplifier unit.

ELECTRONIC DEVICE FOR PERFORMING COMMUNICATION USING MULTIPLE FREQUENCY BANDS AND OPERATION METHOD OF ELECTRONIC DEVICE (18201280)

Inventor John MOON

Brief explanation

The abstract describes a method for operating an electronic device. It involves measuring the strength of signals in two different frequency bands and mapping these measurements to specific voltage magnitudes. The device then controls a power supply circuit to apply the appropriate voltage magnitudes to amplifiers based on the measured signal strengths.

Abstract

In certain embodiments, a method of operating an electronic device, comprises: identifying strength of a signal within a first frequency band and strength of a signal within a second frequency band when operating in a mode of transmitting a signal within the first frequency band and a signal within the second frequency band; identifying first magnitudes of voltages based on mapping data in a memory, wherein the mapping data maps first magnitudes of the voltages according to strength of signal within the first frequency band and second magnitudes of the voltages according to strength of signal within the second frequency band, and the identified strength of the signal within the first frequency band; identifying the second magnitudes of the voltages based on the identified strength of the signal within the second frequency band and the mapping data; when there are identical magnitude of voltages among the first magnitudes of voltages applicable and the second magnitudes of voltages, controlling a power supply circuit to apply the identical magnitude of voltages to a first amplifier and/or a second amplifier.

ELECTRONIC DEVICE FOR CONTROLLING PHASE DIFFERENCE OF POWER PROVIDED TO RECTIFIER, AND METHOD FOR CONTROLLING SAME (18335015)

Inventor Chongmin LEE

Brief explanation

The abstract describes an electronic device that can receive power wirelessly. It includes a resonance circuit with a battery, coil, and capacitor, which receives alternating current power. This power is then rectified into direct current power by a rectifying circuit with multiple transistors. The device also has a control circuit that can identify the phase difference between the voltage and current of the received power and perform impedance matching by adjusting the bias voltage of the transistors. This adjustment is based on a designated condition for the phase difference.

Abstract

An electronic device may include: a resonance circuit including a battery, a coil, and a capacitor, and configured to receive power wirelessly; a rectifying circuit including multiple transistors, and configured to rectify alternating current power provided from the resonance circuit into direct current power; and a control circuit, wherein the control circuit is configured to: identify a difference between the phase of voltage and the phase of current of the alternating current power provided from the resonance circuit during wireless reception of power from an external electronic device; and perform impedance matching by controlling the bias voltage of at least one of the multiple transistors on the basis that the difference between the phase of voltage and the phase of current satisfies a designated condition.

INFORMATION SHARING FOR BEAM MANAGEMENT IN REPEATER (18110178)

Inventor Mohamed Mokhtar Gaber Moursi AWADIN

Brief explanation

The abstract describes a method for a repeater to determine an access link beam. The repeater receives information from a base station, which includes beam indices and the corresponding time to use a specific beam. The repeater then transmits data using the indicated beam.

Abstract

Disclosed is a method of determining an access link beam by a repeater, including receiving, from a base station, an indication of beam indices including an indicated beam and a corresponding time to apply the indicated beam and transmitting at least one resource set using the indicated beam.

LINK ADAPTATION METHOD AND DEVICE FOR DYNAMIC TIME DIVISION DUPLEX IN WIRELESS COMMUNICATION SYSTEM (18208065)

Inventor Youngmin JEONG

Brief explanation

The abstract describes a communication system, specifically 5G or pre-5G, that can transmit data at higher rates compared to 4G systems like LTE. The method involves a first base station in the system identifying the signal-to-interference-noise ratio (SINR) based on information received from a terminal. It then determines the modulation and coding scheme (MCS) based on the SINR and information about the link direction from a second base station. Finally, the first base station transmits information to the terminal indicating the MCS to be used.

Abstract

The present disclosure relates to a 5th generation (5G) or pre-5G communication system for supporting higher data transmission rates than 4th generation (4G) communication systems such as long term evolution (LTE). A method performed by a first base station in a wireless communication system includes: identifying a first signal-to-interference-noise ratio (SINR), based on channel state information received from a terminal; identifying a modulation and coding scheme (MCS), based on the first SINR and information on a link direction of a second base station; and transmitting information indicating the MCS to the terminal.

APPARATUS AND METHOD WITH HOMOMORPHIC ENCRYPTION OPERATION (18070846)

Inventor Ahmet Can MERT

Brief explanation

This abstract describes an apparatus and method that use homomorphic encryption. The apparatus includes a processor and memory. The processor is configured to generate split polynomials from a ciphertext, which is a representation of a polynomial with a certain degree. The split polynomials have a lower degree than the original polynomial. The processor then performs element-wise operations on the split polynomials to generate partial operation results. Finally, the processor combines these partial operation results to generate a homomorphic encryption operation result corresponding to the original ciphertext.

Abstract

An apparatus and method with homomorphic encryption are included. An apparatus includes a processor configured to, and/or coupled with a memory storing instructions to configure the processor to: generate, from a ciphertext corresponding to a polynomial having a first degree for performing a homomorphic encryption operation, split polynomials having a second degree by factorizing the polynomial, wherein the split polynomials have a second degree that is less than the first degree, generate partial operation results by performing an element-wise operation using the split polynomials, and generate a homomorphic encryption operation result corresponding to the ciphertext by joining the partial operation results.

SYSTEMS, METHODS AND DEVICES FOR JOINT CALIBRATION OF TRANSMIT AND RECEIVE IQ MISMATCH (18209473)

Inventor Elina NAYEBI

Brief explanation

The abstract describes a method for compensating for IQ mismatch (IQMM) in a transceiver. IQMM refers to a situation where the in-phase (I) and quadrature (Q) components of a signal are not properly aligned. 

In this method, the transceiver sends two signals (first and second) from the transmit path through a loopback path. A phase shifter is used to introduce a phase shift in at least one of these signals. The receive path then receives these signals, resulting in first and second received signals.

The first and second received signals are used to estimate the IQMM, specifically the phase shift introduced by the phase shifter. This estimation helps in compensating for the IQMM. The estimation process may involve considering frequency-dependent IQMM parameters.

Overall, the method aims to address IQ mismatch in a transceiver by using loopback signals, phase shifting, and estimation techniques to compensate for the mismatch.

Abstract

A method of compensating for IQ mismatch (IQMM) in a transceiver may include sending first and second signals from a transmit path through a loopback path, using a phase shifter to introduce a phase shift in at least one of the first and second signals, to obtain first and second signals received by a receive path, using the first and second signals received by the receive path to obtain joint estimates of transmit and receive IQMM, at least in part, by estimating the phase shift, and compensating for IQMM using the estimates of IQMM. Using the first and second signals received by the receive path to obtain estimates of the IQMM may include processing the first and second signals received by the receive path as a function of one or more frequency-dependent IQMM parameters.

ELECTRONIC DEVICE FOR RECOGNIZING COVER DEVICE AND OPERATION METHOD THEREOF (18210465)

Inventor Kihun EOM

Brief explanation

The abstract describes an electronic device that has a magnetic sensor and a communication module. The device also has a processor that is connected to the magnetic sensor and the communication module. The processor is programmed to detect a magnetic signal through the magnetic sensor and determine if the signal is generated by attaching a cover device to the electronic device. If it is determined that the signal is from the cover device, the processor will correct the sensor data from the magnetic sensor.

Abstract

An electronic device includes: a magnetic sensor; a communication module; at least one processor operatively connected with the magnetic sensor and the communication module. The at least one processor is configured to: identify that a magnetic signal is detected through the magnetic sensor; identify, based on a magnitude of the detected magnetic signal, whether the magnetic signal is generated by coupling the electronic device with a cover device; and based on identifying that the magnetic signal is generated by coupling the electronic device with the cover device, correct sensor data of the magnetic sensor.

ELECTRONIC DEVICE FOR PROVIDING VIDEO CONFERENCE, AND METHOD THEREFOR (18332256)

Inventor Hoyoung SEOC

Brief explanation

This abstract describes an electronic device that has a communication module, a display module, and a processor. The device can establish a connection with other electronic devices, display images, and perform various functions. Specifically, it can transmit an image to other devices, display the image on its own screen, select a specific area of the image, generate a new image with a contour of that area and dividing lines, transmit the new image to other devices, and display it on its own screen.

Abstract

An electronic device is provided. The electronic device incudes a communication module which establishes a communication connection with at least one external electronic device, a display module, and a processor operatively connected to the communication module and the display module. The processor is configured to transmit a first image to the at least one external electronic device by using the communication module, output the first image to the display module, select a first area, which is at least a partial area of the output first image, generate a second image including a contour of the first area and at least one line dividing the first area into a plurality of second areas, transmit the second image to the at least one external electronic device, and output the second image to the display module.

ELECTRONIC APPARATUS AND CONTROL METHOD THEREOF (18208150)

Inventor Kyunghwa JUNG

Brief explanation

This abstract describes a control method for an electronic device. The method involves determining if an external device is within a certain distance from the electronic device. If the external device is within this distance, the method obtains information about the distance between the two devices. Based on this distance information, the method identifies a standby time. Once this standby time has passed, the electronic device will establish a connection with the external device.

Abstract

A control method of an electronic apparatus includes identifying whether an external device is located within a reference radius of the electronic apparatus; based on the external device being located within the reference radius, obtaining distance information between the identified external device and the electronic apparatus; identifying a standby time based on the distance information; and based on the standby time elapsing, performing connection with the external device.

Encoding Depth Information for Images (17897555)

Inventor Aamer Khani

Brief explanation

The abstract describes a method for encoding depth information in three-dimensional content for images. The depth information is encoded based on a near-plane value and a far-plane value. The method involves accessing the depth information and adjusting the near-plane and far-plane values based on a loss function. The adjusted values are then used to encode the depth information for transmission.

Abstract

In one embodiment, a method includes accessing depth information for three-dimensional content for one or more images, the depth information having been encoded based on a first near-plane value and a first far-plane value. The method further includes accessing an adjusted near-plane value and an adjusted far-plane value, where the adjusted near-plane value and the adjusted far-plane value are based on a loss function with respect to the depth information; and encoding the depth information for transmission using the adjusted near-plane value and the adjusted far-plane value.

ENCODING METHOD AND APPARATUS THEREFOR, AND DECODING METHOD AND APPARATUS THEREFOR (18328481)

Inventor Narae CHOI

Brief explanation

The abstract describes a method for decoding videos. It involves obtaining information about the type of prediction used for a specific block in the video. Based on this information, the method determines the appropriate interpolation filter to use for predicting the block. It also determines the reference location to which the current sample of the block refers. Using the reference samples and the interpolation filter, the method calculates a prediction value for the current sample. Finally, the method reconstructs the block based on this prediction value.

Abstract

Provided is a video decoding method including: obtaining, from a bitstream, intra prediction mode information indicating an intra prediction mode of a current block; determining an interpolation filter set to be used in prediction of the current block, based on at least one of a size of the current block and the intra prediction mode indicated by the intra prediction mode information; determining a reference location to which a current sample of the current block refers according to the intra prediction mode; determining, in the interpolation filter set, an interpolation filter that corresponds to the reference location; determining a prediction value of the current sample, according to reference samples of the current block and the interpolation filter; and reconstructing the current block, based on the prediction value of the current sample.

DISPLAY DEVICE AND OPERATION METHOD THEREOF (18327570)

Inventor Nayoung KIM

Brief explanation

The abstract describes a display device that can detect gestures made by a user while watching video content and display a specific frame corresponding to the detected gesture on the screen. The device includes a display, an image input unit to obtain video content, a detector with sensors, and a processor to execute instructions. The processor detects the user's gesture using the sensors and controls the video playback to show the frame associated with the gesture on the display.

Abstract

A display device may include: a display; an image input unit configured to obtain video content; a detector including at least one sensor; and a processor which may be configured to execute at least one instruction. The processor may be configured to, by executing the at least one instruction, detect a gesture of a user based on a result of detection by the at least one sensor while the video content is reproduced, and control the reproduction of the video content such that at least one frame corresponding to the detected gesture among a plurality of frames included in the video content is displayed on the display.

ELECTRONIC DEVICE AND METHOD PROVIDING CONTENT ASSOCIATED WITH IMAGE TO APPLICATION (18208720)

Inventor Seunghwan JEONG

Brief explanation

This abstract describes an electronic device that includes a camera, memory, display, and processor. The processor is programmed to perform certain tasks when a camera application is executed. It can identify specific images taken within a certain range from the device's location, based on location information stored in the memory or an external device. It then selects one or more priority images from the identified images. While displaying a preview image from the camera on the device's display, it overlays a visual object containing thumbnail images corresponding to the selected priority images onto the preview image.

Abstract

An electronic device according to various embodiments includes a camera, a memory, a display, and a processor. The processor is configured to: based on an input for executing a camera application being received, identify first images shot within a region of a set range from a location of the electronic device from among a plurality of images, based on location information of the plurality of images stored in the memory or an external electronic device; select at least one second image from the first images, based on a priority of each of the first images; and, while displaying a preview image obtained through the camera on the display, display a visual object including a thumbnail image corresponding to the at least one second image on the display by overlaying the visual object on the preview image.

IMAGE SENSORS INCLUDING PHASE DETECTION PIXEL (18336495)

Inventor Hongki Kim

Brief explanation

The abstract describes an image sensor that consists of a pixel array with image sensing pixels and a phase detection shared pixel. The phase detection shared pixel has two subpixels for phase detection. The sensor also includes a color filter fence that separates the image sensing pixels and the phase detection shared pixel, and color filter layers are placed on the image sensing pixels and the shared pixel. Each image sensing pixel has a micro-lens with a certain height, while the shared pixel has a second micro-lens that is taller than the first micro-lens and overlaps the two subpixels.

Abstract

An image sensor is presented which includes a pixel array including a plurality of image sensing pixels in a substrate, a phase detection shared pixel in the substrate, the phase detection shared pixel including two phase detection subpixels arranged next to each other, a color filter fence disposed on the plurality of image sensing pixels, and the phase detection shared pixel, the color filter fence defining a plurality of color filter spaces, a plurality of color filter layers respectively disposed in the plurality of color filter spaces on the plurality of image sensing pixels, and the phase detection shared pixel, a first micro-lens disposed on each of the plurality of image sensing pixels to have a first height, and a second micro-lens disposed to vertically overlap the two phase detection subpixels of the phase detection shared pixel and to have a second height greater than the first height.

IMAGE SENSOR AND VEHICLE (18098237)

Inventor Young Gu JIN

Brief explanation

The abstract describes an image sensor that consists of a group of pixels divided into two regions. Each region contains a pixel with a photodiode, a floating diffusion region, and a transfer transistor. The pixels are arranged in a grid pattern, and the total area of the photodiodes in the first region is larger than the total area of the photodiodes in the second region.

Abstract

An image sensor includes a pixel group including a first region and a second region; and a color filter having a first color on the pixel group, wherein the first region includes a first pixel including a first photodiode, a first floating diffusion region on the first photodiode, and a first transfer transistor on the first photodiode, the second region includes a second pixel including a second photodiode, a second floating diffusion region, and a second transfer transistor connected to the second photodiode and the second floating diffusion region, at least one of the first pixel and the second pixel is arranged in m*n (m and n are natural numbers of 2 or more), and from a planar point of view, a total area of the first photodiode included in the first region is greater than a total area of the second photodiode included in the second region.

EAR TIP, ELECTRONIC DEVICE COMPRISING EAR TIP, AND METHOD FOR MANUFACTURING EAR TIP (18335740)

Inventor Jinyoung KWAK

Brief explanation

The abstract describes an ear tip design that includes three main components: a first member, a shield member, and a second member. The first member has an inner space and is partially surrounded by the second member. The shield member is placed inside the first member's inner space and connects it to the second member's inner space. The first member has two fixing units, one on the first surface of the shield member and another on a region of the second surface that partially overlaps with the first region.

Abstract

An example ear tip includes a first member including a first inner space; a shield member which includes a first surface and a second surface and is arranged in the first inner space; and a second member which includes a second inner space that is connected to the first inner space via the shield member and is coupled to the first member so as to at least partially surround the first member, wherein the first member including a first fixing unit which is coupled to a first region of the first surface and a second fixing unit which is coupled to a region of the second surface, the region partially overlapping the first region.

METHOD AND APPARATUS FOR EFFICIENTLY CONTROLLING ACCESS FOR SYSTEM LOAD ADJUSTMENT IN MOBILE COMMUNICATION SYSTEMS (18333350)

Inventor Sang Bum KIM

Brief explanation

The present invention is a method and apparatus for efficiently controlling access for system load adjustment in mobile communication systems. It involves a terminal, which includes a user equipment (UE) non access stratum (NAS) and a UE access stratum (AS). The method includes the following steps:

1. The UE receives information from a base station, which includes emergency call-related information and barring information for the emergency call. 2. The UE transmits a service request for the emergency call to the UE AS. 3. The UE AS determines whether to bar the service request based on the emergency call-related information.

This method allows for easy control of network congestion during emergency call transmission. It enables various types of emergency calls to be transmitted while also allowing access to be barred based on the situation of the communication network and the types of emergency calls.

Abstract

The present invention relates to a method and apparatus for efficiently controlling access for system load adjustment in mobile communication systems. A method for transmitting and receiving data by a terminal including a user equipment (UE) non access stratum (NAS) and a UE access stratum (AS) includes the steps of: receiving by the UE AE, information including emergency call-related information which includes barring information by type for the emergency call, from a base station; transmitting, by the UE NAS, a service request for the emergency call to the UE AS; and determining, by the UE AS, whether to bar the service request on the basis of emergency call-related information. During an emergency call transmission, network congestion can be easily controlled by enabling various types of emergency calls to be transmitted, and enabling access to be barred information according to the situation of a communication network and types of emergency calls.

ELECTRONIC DEVICE SUPPORTING PROFILE TRANSFER BETWEEN ELECTRONIC DEVICES AND OPERATING METHOD THEREOF (18165701)

Inventor Jieun JUNG

Brief explanation

This abstract describes an electronic device that has a communication circuit and a processor. The processor is able to trigger the transfer of a user's profile from another device to itself by providing certain information. If the transfer is possible using a specific authentication method called EAP-AKA, the device obtains authentication information from a server associated with the transfer. However, if the EAP-AKA authentication is not possible, the device performs a different authentication operation with the server to obtain different authentication information. Based on either the first or second authentication information, the device then performs the necessary operations to complete the profile transfer.

Abstract

An electronic device includes a communication circuit, and a processor electrically connected to the communication circuit. The processor is configured to, provide first information which triggers profile transfer from an external electronic device to the electronic device, based on the profile transfer which is based on an EAP-AKA authenticating operation being possible, obtain first authentication information which is obtained via the EAP-AKA authenticating operation between the external electronic device and a server associated with the profile transfer, based on the profile transfer which is based on the EAP-AKA authenticating operation being impossible, perform, via the communication circuit, an authenticating operation different from the EAP-AKA authenticating operation with the server to obtain second authentication information, and based on one of the first authentication information or the second authentication information, perform an operation for the profile transfer.

SYSTEMS, METHODS, AND DEVICES FOR ASSOCIATION AND AUTHENTICATION FOR MULTI ACCESS POINT COORDINATION (18209468)

Inventor Sharan NARIBOLE

Brief explanation

This abstract describes a method for connecting and verifying a station (STA) with a group of coordinated access points (APs). The method involves creating a secret key (PMK) between the STA and a coordinator of the AP group, and maintaining a connection and verification status based on this key. The method also includes generating temporary keys between the STA and the coordinator, as well as distributing the secret key from the coordinator to two member APs of the group. Additionally, the method involves generating temporary keys between the STA and each member AP.

Abstract

A method for associating and authenticating a station (STA) with a coordinated access point (AP) group may include generating a pairwise master key (PMK) between the STA and a coordinator of the coordinated AP group, and maintaining an association and authentication state between the STA and the coordinated AP group based on the PMK. The method may further include generating one or more temporal keys between the STA and the coordinator based on the PMK. The method may further include distributing the PMK from the coordinator to a first member AP and a second member AP of the coordinated AP group. The method may further include generating a first temporal key between the STA and the first member AP, and generating a second temporal key between the STA and the second member AP.

METHOD AND APPARATUS FOR DYNAMICALLY UPDATING BEAM FAILURE DETECTION RESOURCE OF TRP IN WIRELESS COMMUNICATION SYSTEM (18297369)

Inventor Seungri JIN

Brief explanation

The abstract describes a method performed by a user equipment (UE) in a wireless communication system. The UE receives configuration information from a base station (BS) via a radio resource control (RRC) message. This configuration information includes details about two sets of beam failure detection (BFD) reference signals (RS). Each set contains multiple BFD-RS resources. The UE also receives a medium access control (MAC) control element (CE) from the BS, which includes information about specific BFD-RS resources from each set. The UE then identifies and activates one or more BFD-RSs based on the information provided in the MAC CE.

Abstract

A method performed by a user equipment (UE) in a wireless communication system is provided. The method includes receiving, from a base station (BS) via a radio resource control (RRC) message, configuration information including information on a first beam failure detection (BFD)-reference signal (RS) set and information on a second BFD-RS set, wherein each of the first BFD-RS set and the second BFD-RS set includes a plurality of BFD-RS resources, receiving, from the BS, medium access control (MAC) control element (CE) including information for indicating a first at least one BFD-RS resource included in the first BFD-RS set and a second at least one BFD-RS resource included in the second BFD-RS set, and identifying one or more activated BFD-RSs based on the MAC CE.

METHOD AND APPARATUS FOR MANAGING GAP CONFIGURATION OF MULTIPLE MEASUREMENT GAPS IN A WIRELESS COMMUNICATION SYSTEM (18297550)

Inventor Aby KANNEATH ABRAHAM

Brief explanation

The abstract describes a communication system (5G or 6G) that supports high data transmission rates. It introduces a method for managing multiple measurement gaps in this system. The method involves a base station transmitting measurement gap configuration information to a user equipment (UE). This information includes a first measurement gap configuration without a measurement gap identifier (ID) and a measurement gap list with at least one second measurement gap configuration that has a gap ID. The base station also transmits measurement object information to the UE without an associated measurement gap ID. Based on the first measurement gap configuration, the base station configures a measurement gap for a frequency related to the measurement object information.

Abstract

The disclosure relates to a 5G or 6G communication system for supporting a higher data transmission rate. The present subject matter refers to a method for managing gap configuration of multiple measurement gaps. According to one embodiment of the present disclosure, a method performed by a base station in a wireless communication system is provided. The method includes: transmitting, to a user equipment (UE), a measurement gap configuration information including a first measurement gap configuration without a measurement gap identifier (ID) and a measurement gap list including at least one second measurement gap configuration with a gap ID; transmitting, to the UE, a measurement object information including without an associated measurement gap ID; and configuring a measurement gap based on the first measurement gap configuration for a frequency associated with the measurement object information.

RANDOM ACCESS METHOD, NETWORK NODE AND USER EQUIPMENT (18335751)

Inventor Qi XIONG

Brief explanation

The abstract describes a communication method and system that combines 5G technology with Internet of Things (IoT) technology to support higher data rates. This can be used for various intelligent services such as smart home, smart city, and connected car. The abstract also mentions a random access method, network node, and user equipment that can improve the performance of a user device when accessing a specific cell.

Abstract

The present disclosure relates to a communication method and system for converging a 5th-Generation (5G) communication system for supporting higher data rates beyond a 4th-Generation (4G) system with a technology for Internet of Things (IoT). The present disclosure may be applied to intelligent services based on the 5G communication technology and the IoT-related technology, such as smart home, smart building, smart city, smart car, connected car, health care, digital education, smart retail, security and safety services. The present disclosure provides a random access method, a network node and a user equipment. With the solution of the above embodiment of the present disclosure, the performance of the UE randomly accessing the target cell can be improved.

INTER-CELL BEAM MANAGEMENT CELL SWITCH (18191666)

Inventor Emad N. Farag

Brief explanation

This abstract describes methods and apparatuses for facilitating serving cell changes in a wireless communications network. It focuses on beam management procedures, which involve the use of transmission configuration indicators (TCI) and cell switch commands. The user equipment (UE) mentioned in the abstract consists of a transceiver and a processor. The transceiver receives a TCI state identifier associated with a target serving cell and a cell switch command. In response to the cell switch command, the transceiver transmits a channel conveying a positive hybrid automatic repeat request acknowledgement (HARQ-ACK). The processor, on the other hand, performs a cell switch at a specific time, which is determined by a slot starting after a cell switch application time from the last symbol of the channel conveying the positive HARQ-ACK.

Abstract

Methods and apparatuses for methods and apparatuses for facilitating serving cell changes based on signaling related to beam management procedures in a wireless communications network. A user equipment (UE) comprises a transceiver and a processor operably coupled to the transceiver. The transceiver is configured to receive a transmission configuration indicator (TCI) state identifier (ID) associated with a target serving cell, receive a cell switch command, and transmit, in response to reception of the cell switch command, a channel conveying a positive hybrid automatic repeat request acknowledgement (HARQ-ACK). The processor is configured to perform, based on the cell switch command, a cell switch at a time, wherein the time corresponds to a slot that starts after a cell switch application time from a last symbol of the channel conveying the positive HARQ-ACK.

METHODS, TERMINALS AND BASE STATIONS FOR BEAM FOOTPRINT HANDOVER (18015573)

Inventor Min WU

Brief explanation

This abstract describes a method for beam footprint handover in wireless communication. The method involves a terminal receiving a signaling message instructing it to switch from one coverage area (beam footprint) to another. The terminal then performs the handover by switching the downlink beamforming signals from the first beam footprint to the second beam footprint. Both beam footprints belong to the same cell, and the downlink signals are transmitted using the respective beams.

Abstract

The disclosure provides a method for beam footprint handover, a method for receiving information, a method for transmitting information, a terminal and a base station. The method for beam footprint handover performed by a terminal comprises the following steps: receiving a first signaling, wherein the first signaling is used for instructing the terminal to hand over from a first beam footprint to a second beam footprint; handing over from the first beam footprint to the second beam footprint in response to the first signaling; wherein a beam footprint is a coverage range of the downlink beamforming signals, the first beam footprint and the second beam footprint belong to a same cell, and downlink signals in the first beam footprint are transmitted with the first beam, while downlink signals in the second beam footprint are transmitted with the second beam.

ELECTRONIC DEVICE FOR TRANSMITTING AND/OR RECEIVING PROTOCOL/SERVICE INFORMATION, AND METHOD FOR OPERATING SAME (18334623)

Inventor Junhwan AN

Brief explanation

This abstract describes an electronic device and a method for transmitting and receiving protocol/service information. The device broadcasts an advertisement packet containing certain information, and when it receives a connection request packet from another device with matching information, it sends a connection response packet back to that device.

Abstract

An electronic device for transmitting and/or receiving protocol/service information and a method for operating same are provided. The electronic device broadcasts an advertisement packet including at least one piece of first protocol/service information, receives a connection request packet including at least one piece of second protocol/service information from an external electronic device, and, when the at least one piece of second protocol/service information is the same as the at least one piece of first protocol/service information, transmits a connection response packet to the external electronic device.

METHOD AND USER EQUIPMENT (UE) FOR SELECTING ACCESS NETWORK FOR ROUTING DATA OF THE UE (18302409)

Inventor Koustav ROY

Brief explanation

This abstract describes a method for selecting the access network for routing data from a user's device. The method involves receiving a trigger indicating the need for network services, determining if the user's device is registered on both a 3GPP access network and a non-3GPP access network, and identifying the availability of network services in both networks. Based on this information, the method selects either the 3GPP access network or the non-3GPP access network for routing the data. The selection is based on the availability of network services or specific network parameters.

Abstract

A method of selecting access network for routing data of user equipment (UE) is provided. The method includes receiving trigger indicating a requirement of one or more network services. Further, the method includes determining that a UE is registered on a Third Generation Partnership Project (3GPP) access network and a non-3GPP access network simultaneously. The method includes identifying availability of one or more network services in the 3GPP access network and the non-3GPP access network. Thereafter, the method includes selecting one of, the 3GPP access network and the non-3GPP network, based on availability of one or more network services in one of, the 3GPP access network and the non-3GPP access network, or selecting one of, the 3GPP access network and the non-3GPP network based on one or more network parameters, when one or more network services are available in the 3GPP access network and the non-3GPP access network.

COMMUNICATION METHOD, USER EQUIPMENT AND BASE STATION (18193008)

Inventor Min WU

Brief explanation

This abstract describes a communication system for 5G or 6G networks that aims to support faster data transmission. The system includes a method for communication, user equipment, and a base station. The method involves sending a request signal to the base station, asking it to perform certain operations such as transmitting downlink signals, receiving uplink signals, or entering an active state. The goal of this system is to reduce the impact of base station dormancy on user experience and transmission delay, thereby minimizing power consumption.

Abstract

The disclosure relates to a 5G or 6G communication system for supporting a higher data transmission rate. A communication method, a user equipment and a base station are provided. The communication method includes transmitting a request signaling to a base station to request the base station to perform at least one of the following operations, transmitting at least one downlink signal, receiving at least one uplink signal, and entering an active state. In accordance with the embodiments of the disclosure, the influence of the dormancy of the base station on user experience and transmission delay is reduced when the base station enters a dormant state to reduce power consumption.

RESTRICTED TWT OPERATIONS FOR MULTI-LINK DEVICES (18332628)

Inventor Rubayet Shafin

Brief explanation

This abstract describes methods and devices for enabling restricted target wake time (TWT) operation in a wireless local area network. The devices include a non-access point (AP) multi-link device (MLD) with multiple stations (STAs) and a processor. Each STA has a transceiver for broadcast TWT operation on multi-link operation (MLO) links with corresponding APs of the AP MLD. The processor is connected to the transceivers and is responsible for negotiating a broadcast TWT schedule over a first link between a first STA and a first AP, applying the schedule to the group of links, negotiating a restricted TWT schedule with the AP MLD over at least one link, and establishing the restricted TWT schedule on one or more links.

Abstract

Embodiments of the present disclosure provide methods and apparatuses for facilitating restricted target wake time (TWT) operation in a wireless local area network. The apparatuses include a non-access point (AP) multi-link device (MLD) comprising a plurality of stations (STAs) and a processor. Each STA comprises a transceiver configured for broadcast TWT operation on multi-link operation (MLO) links with corresponding APs of an AP MLD. The processor is operably coupled to the transceivers, and configured to negotiate a broadcast TWT schedule over a first link between a first STA and a first AP of the AP MLD, apply the broadcast TWT schedule to the group of links, negotiate a restricted TWT schedule with the AP MLD over at least one link of the group of links, and establish the restricted TWT schedule on one or more links of the at least one link.

TRANSMISSION AND RECEPTION POWER IN FULL-DUPLEX SYSTEMS (18191684)

Inventor Marian Rudolf

Brief explanation

This abstract describes apparatuses and methods for transmission power in full-duplex systems. It explains a method for operating a user equipment (UE) to receive a downlink (DL) channel or signal. The method involves receiving information for two different sets of parameters for two DL channels or signals associated with different subsets of slots on a cell. The UE then determines which set of parameters to use based on the slot it is receiving from, and adjusts the power accordingly. Finally, the UE receives the DL channel or signal in the slot based on the power adjustment value in the chosen set of parameters.

Abstract

Apparatuses and methods for transmission power in full-duplex systems. A method of operating a user equipment (UE) for receiving a downlink (DL) channel or signal includes receiving first information for a first set of parameters for a first DL channel or signal associated with a first subset of slots from a set of slots on a cell and second information for a second set of parameters for a second DL channel or signal associated with a second subset of slots from the set of slots on the cell. The method further includes determining, based on a slot for a reception being from the second subset of slots, to use the second set of parameters for the reception and receiving, based on a power adjustment value in the second set of parameters, the second DL channel or signal in the slot.

METHOD AND APPARATUS FOR DETERMINING TRANSMIT POWER BUDGET FOR MANAGING RF EXPOSURE OF MOBILE DEVICES USING RADAR SENSING (18063032)

Inventor Vutha Va

Brief explanation

This abstract describes a method for managing the maximum permissible exposure (MPE) limit for radio frequency exposure (RFE) in a time window. The method involves estimating the previous RFE for a target based on radar detection information and transmission history. It also predicts the future RFE for the target and ensures that the sum of the estimated previous RFE and predicted future RFE does not exceed the MPE limit. Based on the predicted future RFE, the method determines a transmission power budget for an electronic device's transceiver during the future time period.

Abstract

A method for managing a maximum permissible exposure (MPE) limit that corresponds to a time window is provided. The method includes estimating, based on radar detection information and transmission history information, a previous radio frequency exposure (RFE) for a target that occurred during a previous time period of the time window. The method includes predicting a future RFE on the target to occur during a future time period of the time window such that a sum of the estimated previous RFE and the predicted future RFE does not exceed the MPE limit for the time window. The method includes determining, based on the predicted future RFE, a transmission power budget for a transceiver of an electronic device for transmission during the future time period.

METHOD AND SYSTEM FOR HANDLING PAGING CAUSE OF SERVICE PROVIDED BY WIRELESS NETWORK DEVICE (18012800)

Inventor Lalith KUMAR

Brief explanation

This abstract describes a method and a wireless network device for handling a paging cause of a service. The wireless network device receives a message from a user equipment (UE) that includes the paging cause of the service and a first value corresponding to the paging cause. The wireless network device then modifies the first value to a second value and sends a response message to the UE. The response message includes the paging cause and the second value, which allows the UE to respond to a paging message based on the second value of the paging cause.

Abstract

Embodiments herein provide a method and a wireless network device () for handing a paging cause of a service. The method includes receiving, by the wireless network device (), a NAS message includes the paging cause of the service provided by the wireless network device () and a first value corresponding to the paging cause from a UE (). The method includes modifying, by the wireless network device (), the first value of the paging cause of the service to a second value, and sending a NAS response message to the UE (), where the NAS response message includes the paging cause of the service and the second value of the paging cause. The second value enables the UE () to respond to a paging message based on the second value of the paging cause.

APPARATUS AND METHOD FOR RECEIVING PAGING-RELATED INFORMATION (18296688)

Inventor Anil AGIWAL

Brief explanation

This abstract describes a method for monitoring paging in a wireless communication system, specifically in the context of a 5G or 6G network. The method involves a user equipment (UE) receiving system information from a cell, which includes a configuration for paging early indication (PEI). The UE then checks if a certain parameter is configured in the system information, indicating that it should only monitor PEI if the latest received radio resource control (RRC) release message is from the cell. If the parameter is configured and the UE has received the RRC release message most recently from the cell, it proceeds to monitor PEI in that cell.

Abstract

The disclosure relates to a 5-generation (5G) or 6-generation (6G) communication system for supporting a higher data transmission rate. A method for monitoring paging by a user equipment (UE) in a wireless communication system is provided. The method includes receiving, from a cell, system information including paging early indication (PEI) configuration, identifying whether a parameter is configured via the system information, wherein the parameter indicates that the UE monitors PEI only if the latest received RRC release message is from the cell, in case that the parameter is configured, identifying whether an radio resource control (RRC) release message is received most recently in the cell, and in case that the parameter is configured and the RRC release message is received most recently in the cell, monitoring PEI in the cell.

METHOD AND APPARATUS FOR ALLOCATING FREQUENCY RESOURCES IN WIRELESS COMMUNICATION SYSTEM (18011985)

Inventor Jinyoung OH

Brief explanation

The present disclosure discusses a communication system, specifically for 5G or 6G networks, that can support higher data transmission rates compared to the previous 4G LTE system. The disclosure introduces a method and apparatus for indicating the frequency resource or format in a wireless communication system that uses a dual connection scheme. This method allows for the classification of frequency resources into resource block sets or resource group units and the configuration of uplink, downlink, and flexible frequency resource formats for a resource group. These configurations can be semi-statically or dynamically changed, allowing for effective utilization of frequency resources for transmission and reception in both uplink and downlink directions.

Abstract

The present disclosure relates to a 5G or 6G communication system for supporting data transmission rates higher than that of a 4G communication system such as LTE. Disclosed are a method and an apparatus for indicating a frequency resource or a format of the resource in a wireless communication system using a dual connection scheme. The method and the apparatus of the present disclosure semi-statically or dynamically change: a method for classifying frequency resources as resource block sets or resource group units and configuring at least one from among uplink, downlink, and flexible frequency resource formats for a resource group; and the configured frequency resource format, and thus the frequency resources for uplink/downlink transmission and reception can be effectively used.

METHOD AND APPARATUS FOR TRANSMISSIONS OVER MULTIPLE SLOTS IN DUPLEX MODE (18190869)

Inventor Carmela Cozzo

Brief explanation

This abstract describes apparatuses and methods for transmitting data over multiple slots in duplex mode. The method involves receiving information for first slots that contain uplink symbols associated with specific frequency resources, and second slots that contain uplink symbols associated with different frequency resources. The method also includes transmitting a channel over a certain number of slots, which can include both the first and second slots. The method further involves determining specific sets of frequency resources within a sub-band and a bandwidth for transmitting the channel over the first and second slots respectively. Finally, the channel is transmitted over the determined frequency resources within the sub-band and the bandwidth.

Abstract

Apparatuses and methods for transmissions over multiple slots in duplex mode. A method includes receiving information for first slots that include first uplink (UL) symbols associated with first frequency resources of a sub-band (SB), second slots that include second UL symbols associated with second frequency resources of a bandwidth (BW), and transmission of a channel over a first number of slots including slots from the first slots and the second slots. The method further includes determining a first set of frequency resources within the SB for transmission of the channel over the first slots and a second set of frequency resources within the BW for transmission of the channel over the second slots. The method further includes transmitting the channel in the first set of frequency resources within the SB over the first slots and in the second set of frequency resources within the BW over the second slots.

DEVICE AND METHOD FOR FRONTHAUL TRANSMISSION IN WIRELESS COMMUNICATION SYSTEM (18334689)

Inventor Hyoungjin LIM

Brief explanation

This abstract describes a new communication system called pre-5G or 5G that aims to support higher data rates compared to the existing 4G LTE system. The system includes a device called a radio unit (RU) that is part of a base station in a wireless communication system. The RU device consists of at least one transceiver and at least one processor. The processor is designed to receive a control message from a digital unit (DU) through a fronthaul interface. This control message contains a section extension field that provides additional information. The processor then uses this additional information to acquire a beamforming weight. The control message is primarily used to schedule a terminal in the control plane of the system.

Abstract

A pre-5-Generation (5G) or 5G communication system for supporting higher data rates Beyond 4-Generation (4G) communication system such as Long Term Evolution (LTE) is provided. The device of a radio unit (RU) of a base station in a wireless communication system includes at least one transceiver and at least one processor coupled to the at least one transceiver, wherein the at least one processor is configured to receive a first control message including a section extension field from a digital unit (DU) via a fronthaul interface, identify additional information based on the section extension field, and acquire a beamforming weight based on the additional information, wherein the first control message is configured to schedule a terminal in a control plane.

METHOD AND APPARATUS FOR DOWNLINK CONTROL INFORMATION INTERPRETATION IN WIRELESS COMMUNICATION SYSTEM (18132653)

Inventor Kyungjun CHOI

Brief explanation

The abstract describes a method used by a terminal in a wireless communication system, specifically for 5G or 6G networks. The method involves receiving signals and information from a base station, including time domain resource assignment (TDRA) information and downlink control information (DCI) with an antenna port field. The terminal then identifies different antenna port tables based on the antenna port field, specifically for cases where the DCI includes multiple scheduling information of different mapping types.

Abstract

The disclosure relates to a 5G or 6G communication system for supporting a higher data transmission rate. The disclosure provides a method performed by a terminal in a wireless communication system. The method includes receiving, from a base station, a higher layer signal including time domain resource assignment (TDRA) information; receiving, from the base station, downlink control information (DCI) including an antenna port field; and identifying an antenna port table of a first mapping type and an antenna port table of a second mapping type based on the antenna port field, in case that the DCI includes multiple scheduling information of different mapping types.

METHOD AND APPARATUS FOR DATA TRANSMISSION IN RRC_INACTIVE (18191447)

Inventor Anil AGIWAL

Brief explanation

This abstract describes a method used by a terminal in a wireless communication system to support high data transmission rates in a 5G or 6G network. The method involves receiving a message that includes information about suspending the system and configuring small data transmission. The terminal then starts a timer for time alignment based on the small data transmission configuration. If certain criteria for a small data transmission procedure are met and a configured grant occasion is not available, the terminal performs a random access-small data transmission procedure.

Abstract

The disclosure relates to a 5G or 6G communication system for supporting a higher data transmission rate. A method performed by a terminal in a wireless communication system is provided. The method includes receiving a radio resource control (RRC) release message including suspend configuration information and configured grant-small data transmission (CG-SDT) configuration information, starting a timer related to a time alignment (TA) for CG-SDT based on the CG-SDT configuration information, identifying that criteria for a small data transmission (SDT) procedure is met, and in case that any configured grant (CG) occasion corresponding to a synchronization signal block (SSB) with a reference signal received strength (RSRP) above a threshold value is not available while the timer related to the TA for CG-SDT is running, and criteria for a random access-small data transmission (RA-SDT) procedure is met, performing the RA-SDT procedure.

APPARATUS AND METHOD FOR TRANSMITTING CONTROL CHANNEL IN WIRELESS COMMUNICATION SYSTEM (18208637)

Inventor Youngkwan CHOI

Brief explanation

This abstract describes a method for transmitting control information in a wireless communication system. The method involves acquiring information bits and generating a transmission bitstream based on channel coding and scrambling. A transmission complex sequence is then generated from a set of complex sequences, and this sequence is transmitted to a base station through a physical uplink control channel. Each complex sequence is based on a Zadoff-Chu sequence, and the length of the Zadoff-Chu sequence is larger than the number of candidate values in the transmission bitstream.

Abstract

Embodiments of the present disclosure relate to control channel transmission in a wireless communication system thereof are provided. The method, executed by a processor in user equipment (UE) or a base station (BS), may include acquiring information bits for uplink control information; acquiring a transmission bitstream, the transmission bitstream being based on channel coding and scrambling for the information bits; generating a transmission complex sequence corresponding to the transmission bitstream, the transmission complex sequence being from among a plurality of complex sequences; and transmitting a signal of the transmission complex sequence to a base station (BS) through a physical uplink control channel (PUCCH), wherein each of the plurality of complex sequences is based on a respective Zadoff-Chu (ZC) sequence, and a respective length of the ZC sequence is larger than a number of candidate values of the transmission bitstream.

METHOD AND APPARATUS FOR GROUP-BASED MULTI-BEAM OPERATION (18333450)

Inventor Md. Saifur Rahman

Brief explanation

The abstract describes a method for operating a user equipment (UE) device. The UE receives configuration information about a set of transmission configuration indicator (TCI) states. It also receives a beam indication, which indicates at least one TCI state from the set. Each TCI state represents a group of beams that are divided into sets for different entities. The UE decodes the beam indication and determines a specific beam for a particular entity based on the set of beams associated with that entity. The UE then uses this determined beam to transmit or receive data in the uplink or downlink direction. The method allows for efficient beam selection and communication in the UE device.

Abstract

A method for operating a user equipment (UE) comprises receiving configuration information on a set of transmission configuration indicator (TCI) states; receiving a beam indication indicating at least one TCI state from the set of TCI states, wherein the at least one TCI state indicates a group of M beams partitioned into K sets of beams for K entities (E, E, . . . E), where an i-th set of beams is associated with entity Eand comprises Nbeams, and ΣN=M; decoding the beam indication; determining a beam for entity Ebased on the i-th set of beams; and transmitting an uplink (UL) transmission or receiving a downlink (DL) transmission based on the determined beam for entity E, wherein i is an entity index and takes a value from {1, . . . , K}.

DYNAMIC ADAPTATION OF TIME DOMAIN RESOURCE FOR PERIODIC OR SEMI-PERSISTENT DOWNLINK SIGNALS (18185354)

Inventor Hongbo Si

Brief explanation

This abstract describes apparatuses and methods for dynamically adapting a time domain resource for a periodic or semi-persistent downlink signal. The method involves a user equipment (UE) receiving a set of configurations from a higher layer. From this set, the UE identifies a first set of configurations indicating resources for receiving downlink signals, and a second set of configurations for a physical downlink control channel (PDCCH) that includes a downlink control information (DCI) format with adaptation information. The UE then receives the downlink signals based on the first set of configurations and the PDCCH with the DCI format based on the second set of configurations. Using the adaptation information, the UE identifies a third set of configurations indicating the resources for receiving the downlink signals and receives the downlink signals based on this third set of configurations.

Abstract

Apparatuses and methods for dynamic adaptation of a time domain resource for periodic or semi-persistent downlink signal are provided. A method of operating a user equipment (UE) includes receiving a set of configurations from a higher layer, identifying a first set of configurations from the set of configurations indicating resources for reception of downlink signals, and identifying a second set of configurations from the set of configurations for a physical downlink control channel (PDCCH) including a downlink control information (DCI) format. The DCI format includes adaptation information. The method further includes receiving the downlink signals based on the first set of configurations, receiving the PDCCH including the DCI format based on the second set of configurations, identifying, based on the adaptation information, a third set of configurations indicating the resources for reception of the downlink signals, and receiving the downlink signals based on the third set of configurations.

METHOD AND APPARATUS OF DYNAMIC BEAM INDICATION AND SWITCHING (18190842)

Inventor Dalin Zhu

Brief explanation

This abstract describes methods and devices used in a wireless communication system for dynamic beam indication and switching. The user equipment (UE) receives downlink control information (DCI) which includes a first field indicating a transmission configuration indication (TCI) codepoint. The UE also receives radio resource control (RRC) signaling which includes a parameter indicating whether a second field indicating a different TCI codepoint is present in the DCI. Based on this information, the UE identifies the presence or absence of the second field and determines a set of TCI states. The first field is a TCI field, and the second field utilizes bits from existing DCI fields.

Abstract

Methods and apparatuses for dynamic beam indication and switching in a wireless communication system. A method performed by a user equipment (UE) includes receiving, in downlink control information (DCI), at least a first DCI field to indicate a first transmission configuration indication (TCI) codepoint and receiving radio resource control (RRC) signaling including a first parameter indicating whether a second DCI field indicating a second TCI codepoint is present in the DCI. The method further includes identifying, based on the first parameter, a presence or absence of the second DCI field in the DCI and identifying, based on the first and second DCI fields, a set of a first TCI state and a second TCI state. The first DCI field is a TCI field, and the second DCI field uses one or more bits of one or more existing DCI fields in the DCI.

TRP SUBSET SELECTION AND REPORTING (18295219)

Inventor Gilwon Lee

Brief explanation

This abstract describes apparatuses and methods for selecting and reporting a subset of transmit-receive points (TRP) in a wireless communication system. The method involves a user equipment (UE) receiving information about a channel state information (CSI) report, which includes details about multiple groups of CSI reference signal (CSI-RS) ports and a list of states. Each state corresponds to a subset of the CSI-RS port groups. The UE then selects at least one state from the list, measures the CSI-RS ports in the selected state, and determines CSI based on the measurements. Finally, the UE transmits the CSI report, including the determined CSI.

Abstract

Apparatuses and methods for transmit-receive point (TRP) subset selection and reporting. A method performed by a user equipment (UE) is provided. The method includes receiving information about a channel state information (CSI) report. The information indicates N>1 groups of CSI reference signal (CSI-RS) ports and a list of S states. Each of the S states correspond to a subset of the N groups of CSI-RS ports. The method further includes, based on the information, selecting at least one state from the list of S states, measuring at least one of the N groups of CSI-RS ports, and determining CSI based on the measurement. The method further includes transmitting the CSI report including the determined CSI.

METHOD AND APPARATUS OF SEMI-STATIC MODE SIDELINK CHANNEL ACCESS (18192608)

Inventor Hongbo Si

Brief explanation

The abstract describes methods and devices used in a wireless communication system to initiate channel occupancy in a semi-static mode SL (Single Layer) channel access. The user equipment (UE) receives instructions from a higher layer to use the semi-static mode SL channel access. It also receives a set of configurations, including the duration of a period. The UE determines a portion of the period as channel occupancy and another portion as idle duration. During the idle duration, the UE performs a SL channel access procedure. After successfully performing the procedure, the UE transmits a SL transmission over a channel during the channel occupancy period.

Abstract

Methods and apparatuses for initiating channel occupancy in a semi-static mode SL channel access in a wireless communication system. A method of a user equipment (UE) includes receiving, from a higher layer, an indication on a semi-static mode SL channel access, receiving a set of configurations for the semi-static mode SL channel access, including a duration of a period and determining a first portion of the period as a channel occupancy associated with the period. The method further includes determining a second portion of the period as an idle duration associated with the period, performing a SL channel access procedure in the idle duration associated with the period, and transmitting a first SL transmission over a channel in the channel occupancy associated with the period after successfully performing the SL channel access procedure.

METHOD AND USER EQUIPMENT FOR TRANSMITTING AND RECEIVING SOUNDING REFERENCE SIGNALS (18333066)

Inventor Yi WANG

Brief explanation

The abstract describes a method used by a user equipment (UE) and a base station in a wireless communication system. The UE receives configurations for sounding reference signal (SRS) resources from the base station through higher layer signaling. It also receives control information from the base station that triggers the transmission of an aperiodic SRS. The control information indicates which configuration from the received configurations should be used. The UE then transmits the aperiodic SRS to the base station based on the indicated configuration.

Abstract

The present application discloses methods performed by a UE and a base station in a wireless communication system. A method performed by the UE includes receiving, from a base station, via higher layer signaling, one or more configurations for sounding reference signal (SRS) resources; receiving, from the base station, control information triggering a transmission of an aperiodic SRS, wherein the control information indicates a configuration among the one or more configurations for the SRS resources; and transmitting, to the base station, the aperiodic SRS based on the configuration.

METHOD AND APPARATUS FOR TRANSMITTING AND RECEIVING DATA USING PLURALITY OF CARRIERS IN MOBILE COMMUNICATION SYSTEM (18333926)

Inventor Soeng Hun KIM

Brief explanation

The abstract describes a technology that combines 5G communication systems with Internet of Things (IoT) technology. This technology can be used in various intelligent services such as smart homes, smart buildings, smart cities, smart cars, healthcare, education, retail, and security. The method involves receiving control messages for different cell groups, transmitting a random access preamble on a specific cell, and monitoring the response based on the size of the random access response window for that cell group.

Abstract

The present disclosure relates to converging a 5th-Generation (5G) communication system for supporting higher data rates beyond a 4th-Generation (4G) system with a technology for Internet of Things (IoT), and may be applied to intelligent services, such as smart home, smart building, smart city, smart car, connected car, health care, digital education, smart retail, security and safety services. A method according to disclosed aspects includes receiving a first control message including a first random access response window for a first cell group, receiving a second control message for adding a second cell group, including information on a second random access response window size for the second cell group, transmitting, on a cell of the second cell group, a random access preamble, and monitoring, on the cell of the second cell group, a random access response based on the second random access response window size for the second cell group.

METHOD AND NODE FOR COMMUNICATION IN COMMUNICATION SYSTEM SUPPORTING INTEGRATED ACCESS AND BACKHAUL (IAB) (18016620)

Inventor Weiwei WANG

Brief explanation

The abstract describes a method used by a receiving node and a transmitting node in a communication system that supports integrated access and backhaul (IAB). The receiving node receives a configuration request message from the transmitting node and then performs data duplication configuration on a radio bearer based on the received request. The configuration request message can include information related to the radio bearer or the backhaul link channel, which the receiving node uses to generate configuration information for the backhaul link channel.

Abstract

A method performed by a receiving node and a transmitting node in a communication system supporting integrated access and backhaul (IAB), the receiving node and the transmitting node are provided. The method performed by the receiving node comprises: receiving a configuration request message from a transmitting node; and performing configuration of data duplication on a radio bearer based on the received configuration request message; wherein the configuration request message may be a first resource configuration request message, and wherein the first resource configuration request message comprises at least one of the following: first configuration information related to the radio bearer; and first configuration information related to a backhaul link channel, for the receiving node to generate configuration information related to the backhaul link channel.

ELECTRONIC DEVICE SUPPORTING DUAL CONNECTIVITY AND OPERATION METHOD THEREOF (18297165)

Inventor Keonyoung LEE

Brief explanation

The abstract describes an electronic device that has the ability to establish two connections using different radio access technologies. It can transmit data through both connections simultaneously, but the throughput of the second connection is lower than the first connection. The device can analyze certain parameters associated with each connection and make adjustments to the transmission of data based on the conditions of the uplink channel. By doing so, it can achieve better performance in terms of data transmission.

Abstract

According to an embodiment, an electronic device may comprise at least one communication processor. The at least one communication processor may be configured to: establish, based on dual connectivity, a first connection based on a first radio access technology (RAT) and a second connection based on a second RAT; transmit first uplink data based on the first connection and transmit second uplink data based on the second connection, wherein a throughput corresponding to the second connection may be a first value; identify at least one first parameter associated with the first connection and at least one second parameter associated with the second connection; perform at least one operation for transmitting, based on the second connection, uplink (UL) data with a throughput less than the first value, based on the at least one first parameter satisfying a first condition indicating a good uplink channel state and that the at least one second parameter satisfying a second condition indicating a poor uplink channel state; and based on performing the at least one operation, transmit third uplink data based on the first connection and transmit fourth uplink data based on the second connection, wherein a throughput corresponding to the second connection may be less than the first value.

METHOD AND APPARATUS FOR PDCP RE-ESTABLISHMENT PROCEDURE OF UE SUPPORTING ETHERNET HEADER COMPRESSION PROTOCOL IN WIRELESS COMMUNICATION SYSTEM (18299387)

Inventor Donggun KIM

Brief explanation

This abstract describes a method used by a user equipment (UE) in a wireless communication system, specifically in a fifth generation (5G) or sixth generation (6G) system. The method involves receiving a message from a base station (BS) that includes configuration information for various communication protocols. The UE then identifies whether a certain protocol device is connected to another protocol device that has a specific function called "out-of-sequence delivery." Based on this identification, the UE configures a reordering function in the protocol device. The protocol device mentioned here can be either an RLC acknowledged mode (AM) device or an RLC unacknowledged mode (UM) device.

Abstract

The disclosure relates to a fifth generation (5G) or sixth generation (6G) communication system for supporting a higher data transmission rate. A method performed by a user equipment (UE) in a wireless communication system is provided. The method includes receiving a radio resource control (RRC) message from a base station (BS), the RRC message including radio link control (RLC) device (entity) configuration information, packet data convergence protocol (PDCP) device configuration information, and bearer configuration information, identifying whether a PDCP device is connected to an RLC device in which an out-of-sequence delivery function (rlc-OutOfOrderDelivery) is configured, based on the RRC message, and configuring a reordering function in the PDCP device, based on whether the PDCP device is connected to the RLC device, wherein the RLC device may be at least one device of an RLC acknowledged mode (AM) RLC device or an RLC unacknowledged mode (UM) mode RLC device.

INTEGRATED ACCESS AND BACKHAUL TIMING MODE SIGNALING (18191500)

Inventor Milos TESANOVIC

Brief explanation

This abstract describes a communication system, specifically for 5G or 6G, that aims to support faster data transmission rates. It introduces a method for a first node in this wireless communication system. The method involves the first node receiving a radio resource control (RRC) message from a second node, which includes information about a list of slots. The first node also receives a medium access control (MAC) control element (CE) from the second node, which indicates a timing mode to be applied to at least one slot in the list. Based on the MAC CE, the first node identifies the corresponding timing mode for the slot(s).

Abstract

The disclosure relates to a 5 Generation (5G) or 6 Generation (6G) communication system for supporting a higher data transmission rate. A method for a first node in a wireless communication system is provided. The method includes receiving, from a second node, a radio resource control (RRC) message including information on a list of slots, receiving, from the second node, a medium access control (MAC) control element (CE) indicating at least one timing mode to be applied to at least one slot in the list of slots, and identifying, based on the MAC CE, the at least one timing mode corresponding to the at least one slot.

METHOD AND APPARATUS FOR PERFORMING EFFICIENT LAYER 2 FUNCTION IN MOBILE COMMUNICATION SYSTEM (18327523)

Inventor Sangbum KIM

Brief explanation

The abstract describes a communication technique that combines IoT technology with a 5G communication system to support faster data transfer rates compared to the previous 4G system. This technology can be used in various intelligent services such as smart homes, buildings, cities, cars, healthcare, education, retail, and security. The abstract also mentions a method and apparatus for setting up an efficient hierarchical layer 2 architecture in the next-generation mobile communication system.

Abstract

The present disclosure relates to a communication technique for converging IoT technology with a 5G communication system for supporting a higher data transfer rate beyond a 4G system, and a system therefor. The present disclosure can be applied to intelligent services (e.g., smart homes, smart buildings, smart cities, smart or connected cars, health care, digital education, retail business, and services associated with security and safety) on the basis of 5G communication technology and IoT-related technology. Disclosed are a method and an apparatus for configuring an efficient hierarchical layer 2 architecture and main functions thereof in a next-generation mobile communication system.

CONTROL KNOB AND COOKING SYSTEM (18209042)

Inventor Heejun KANG

Brief explanation

This abstract describes a cooking system that includes a cooking device and a control knob. The control knob has light emitting elements and can be attached to the cooking device. The cooking device can transmit wireless power to the control knob and drive heating coils based on the movement of the control knob. It can also determine which heating coil to control based on changes in the magnetic field detected by a sensor. The control knob can control the light emitting elements based on magnetic field data received from the cooking device.

Abstract

A cooking system disclosed herein may comprises a cooking device; and a control knob attachable to the cooking device and including a plurality of light emitting elements, wherein the cooking device is configured to, with the control knob attached to the cooking device, transmit wireless power to the control knob, drive at least one heating coil based on movement of the control knob, determine a target coil to be controlled among the at least one heating coil based on a change in magnetic field detected by a sensor according to movement of the control knob, and control firepower of the target coil, and the control knob is configured to, with the control knob attached to the cooking device, control the plurality of light emitting elements based on magnetic field data received from the cooking device.

ELECTRONIC DEVICE COVER HAVING LAYERED STRUCTURE AND METHOD FOR MANUFACTURING SAME (18209191)

Inventor Sookyu LEE

Brief explanation

This application describes a cover for an electronic device that is made up of multiple layers. The cover includes a substrate made of magnesium, a layer that has undergone a chemical conversion treatment, a bending supplement layer, a color layer, and an ultraviolet molding layer. The abstract mentions that there are other possible embodiments of this device cover.

Abstract

This application relates to an electronic device cover having a layered structure and a method for manufacturing the same. An embodiment may include a substrate including magnesium, a first chemical conversion-treated layer formed on the substrate, a bending supplement layer formed on the first chemical conversion-treated layer, a color layer formed on the bending supplement layer, and an ultraviolet molding layer formed on the color layer. Various other embodiments are possible.

SEMICONDUCTOR MEMORY DEVICE (18175445)

Inventor Minjun LEE

Brief explanation

This abstract describes a semiconductor memory device that consists of multiple memory cells arranged on a substrate. Each memory cell includes two transistors. The first transistor has a channel region between a source region and a drain region, a gate electrode, and a gate insulating layer. The second transistor is stacked on top of the first transistor and has a pillar structure with a drain region, a channel region, and a source region. It also has a gate electrode and a gate insulating layer. The drain and source regions of the second transistor have different types of impurity regions.

Abstract

A semiconductor memory device includes a plurality of memory cells arranged on a substrate. Each of the plurality of memory cells may include a first transistor on the substrate and a second transistor on the first transistor. The first transistor may include a first channel region between a first source region and a first drain region, a first gate electrode, and a first gate insulating layer. The second transistor may include a pillar structure having a second drain region, a second channel region and a second source region sequentially stacked on the first gate electrode, a second gate electrode on one side of the second channel region, and a second gate insulating layer between the second channel region and the second gate electrode. The second drain region and the second source region may have a first conductivity type impurity region and a second conductivity type impurity region, respectively.

SEMICONDUCTOR DEVICE (18097675)

Inventor DONG-SIK PARK

Brief explanation

This abstract describes a semiconductor device that includes a substrate with a cell array region. On this region, there is a data storage structure consisting of a bottom electrode, a top electrode, and a dielectric layer between them. A blocking layer is placed on top of the top electrode, followed by a lower interlayer insulating layer. A lower contact is then inserted through the lower interlayer insulating layer to connect with the top electrode. The lower contact's side surface makes contact with the blocking layer.

Abstract

A semiconductor device may include a substrate including a cell array region, a data storage structure provided on the cell array region of the substrate, the data storage structure including a bottom electrode, a top electrode on the bottom electrode, and a dielectric layer interposed between the bottom electrode and the top electrode, a blocking layer provided on a top surface of the top electrode, a lower interlayer insulating layer provided on the blocking layer, and a lower contact penetrating the lower interlayer insulating layer and electrically connected to the top electrode. At least a portion of a side surface of the lower contact may contact the blocking layer.

SEMICONDUCTOR DEVICE (17936960)

Inventor Jihye Son

Brief explanation

This abstract describes a semiconductor device that includes various components such as a substrate, active patterns, source/drain regions, isolation layers, buffer layers, conductive patterns, spacers, contacts, landing pads, abrasive particles, and data storage elements. These components work together to create a functional semiconductor device.

Abstract

A semiconductor device includes a substrate including a first active pattern having first and second source/drain regions of a cell region, a device isolation layer in a trench defining the first active pattern on the cell region, a buffer layer on the cell region, a line structure extends in a third direction, extends from the cell region to a boundary region, and including a first conductive pattern that passes through the buffer layer and contacts the first source/drain region, a bit line on the first conductive pattern, and a first barrier pattern between the bit line and the first conductive pattern, a pair of spacers respectively on both sidewalls of the line structure, a contact on the second source/drain region, a landing pad on the contact, a first abrasive particle between the contact and the landing pad, and a data storage element on the landing pad.

CAPACITOR AND MEMORY DEVICE (18205715)

Inventor Cheoljin CHO

Brief explanation

The abstract describes a capacitor and a DRAM device. The capacitor consists of a lower electrode, a dielectric layer structure, and an upper electrode. The dielectric layer structure is made up of three layers stacked in sequence: a first zirconium oxide layer, a hafnium oxide layer, and a second zirconium oxide layer. The hafnium oxide layer has either a tetragonal crystal phase or an orthorhombic crystal phase.

Abstract

A capacitor and a DRAM device, the capacitor including a lower electrode; a dielectric layer structure on the lower electrode, the dielectric layer structure including a first zirconium oxide layer, a hafnium oxide layer, and a second zirconium oxide layer sequentially stacked; and an upper electrode on the dielectric layer structure, wherein the hafnium oxide layer has a tetragonal crystal phase or an orthorhombic crystal phase.

SEMICONDUCTOR DEVICE (17987011)

Inventor MIN HEE CHO

Brief explanation

This abstract describes a semiconductor device that consists of several components. It includes a first conductive line that runs horizontally, multiple semiconductor patterns placed on the first conductive line with gaps between them, a second conductive line that intersects the first conductive line and connects to the semiconductor patterns, a gate dielectric pattern between the semiconductor patterns and the second conductive line, and a blocking pattern between adjacent semiconductor patterns.

Abstract

A semiconductor device includes a first conductive line that extends in a first horizontal direction, a plurality of semiconductor patterns on the first conductive line and spaced apart from each other in the first horizontal direction wherein each of the semiconductor patterns includes a first vertical part and a second vertical part that are opposite to each other in the first horizontal direction, a second conductive line that extends in a second horizontal direction between the first vertical part and the second vertical part of each of the semiconductor patterns, the second horizontal direction intersecting the first horizontal direction, a gate dielectric pattern between the first vertical part and the second vertical part and between the second vertical part and the second conductive line, and a blocking pattern between neighboring semiconductor patterns.

SEMICONDUCTOR DEVICE (18062263)

Inventor Dong Kyun LEE

Brief explanation

This abstract describes a semiconductor device that consists of multiple capacitor blocks and an electrode support. The first capacitor block has a conductive plate and lower electrodes, while the second capacitor block has a separate conductive plate and lower electrodes. There are also edge capacitor blocks surrounding each of the capacitor blocks, with edge electrodes on their respective conductive plates. The electrode support holds all the lower and edge electrodes. A penetration pattern is present in the electrode support, specifically over the lower electrodes but not over the edge electrodes.

Abstract

A semiconductor device includes a first capacitor block including a first conductive plate, and first lower electrodes on the first conductive plate, a second capacitor block including a second conductive plate spaced apart from the first conductive plate, and second lower electrodes on the second conductive plate, a first edge capacitor block including first edge electrodes on the first conductive plate and surrounding the first capacitor block, a second edge capacitor block including a second edge electrodes on the second conductive plate and surrounding the second capacitor block and a first electrode support which supports the first lower electrodes, the second lower electrodes, the first edge electrodes, and the second edge electrodes. A first penetration pattern penetrates the first electrode support, is over the first lower electrodes and the second lower electrodes, and is not over the first edge electrodes and the second edge electrodes.

SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME (18062264)

Inventor Beom Seo KIM

Brief explanation

The abstract describes a semiconductor memory device that includes various components such as a substrate, a bit line, storage contacts, a storage pad, and an information storage portion. The storage contact is made up of a lower storage contact and an upper storage contact, with the lower storage contact being partially located in the substrate. The upper surface of the lower storage contact is in contact with the lower surface of the upper storage contact. Both the lower and upper storage contacts are made of semiconductor material.

Abstract

A semiconductor memory device including a substrate including an active area defined by an element isolation layer, a bit line extending in a first direction on the substrate, a storage contact on each of both sides of the bit line and connected to the active area, a storage pad on the storage contact and connected to the storage contact and an information storage portion on the storage pad and connected to the storage pad, wherein the storage contact includes a lower storage contact and an upper storage contact on the lower storage contact, at least a portion of the lower storage contact is in the substrate, an entire upper surface of the lower storage contact is in contact with an entire lower surface of the upper storage contact, and each of the lower storage contact and the upper storage contact includes a semiconductor material may be provided.

SEMICONDUCTOR DEVICE (18089956)

Inventor Seonhaeng Lee

Brief explanation

The abstract describes a semiconductor device that includes a fin pattern on a substrate, with two active layers on top of the fin pattern. The active layers are arranged in a specific structure and are surrounded by two gates that intersect them. The first gate surrounds the upper and lower surfaces as well as the side surfaces of both active layers, while the second gate is parallel to the first gate. The first active layer extends from an overlapping region with the first gate, while the second active layer extends from an overlapping region with the second gate. The length of the first region of the first active layer is longer than the length of the first region of the second active layer.

Abstract

A semiconductor device includes a first fin pattern protruding from a substrate and extending in a first direction; first and second active layers extending in the first direction on the first fin pattern, the second active layer being at a level higher than a level of the first active layer, the first and second active layers forming a first active layer structure; a first gate intersecting the first and second active layers, surrounding upper and lower surfaces and opposing side surfaces of each of the first and second active layers, and extending in a second direction; and a second gate intersecting the first and second active layers, surrounding upper and lower surfaces and opposing side surfaces of each of the first and second active layers, extending in the second direction, and disposed to be parallel to the first gate. The first active layer includes a first region extending from a first overlapping region of the first active layer overlapping the first gate by a first length in a direction away from the second gate, and the second active layer includes a first region extending from a first overlapping region of the second active layer overlapping the first gate by a second length in a direction away from the second gate, the second length shorter than the first length.

SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME (18067390)

Inventor Ji Hun NOH

Brief explanation

This abstract describes a semiconductor memory device that includes various components such as a substrate, an active area, a word line, a bit line, and a bit line contact. The active area is defined by an element isolation layer on the substrate. The word line and bit line cross the active area in different directions. The bit line contact is directly connected to both the bit line and the active area, and it is located between the substrate and the bit line. The bit line contact consists of a lower bit line contact that is directly connected to the active area, and an upper bit line contact that is on top of and in contact with the lower bit line contact. The width of the upper surface of the lower bit line contact is greater than the width of the lower surface of the upper bit line contact in the direction perpendicular to the bit line.

Abstract

A semiconductor memory device may include a substrate including an active area defined by an element isolation layer on the substrate, a word line crossing the active area and extending in a first direction, a bit line crossing the active area on the substrate and extending in a second direction, and a bit line contact directly connected to the bit line and the active area. The bit line contact may be between the substrate and the bit line. The bit line contact may include a lower bit line contact directly connected to the active area and an upper bit line contact on and in contact with the lower bit line contact. A width of an upper surface of the lower bit line contact in the second direction may be greater than a width of a lower surface of the upper bit line contact in the second direction.

SEMICONDUCTOR DEVICES (18116537)

Inventor Eunbin Seon

Brief explanation

This abstract describes a semiconductor device that consists of a metal silicide layer on a substrate. On top of the metal silicide layer, there is a contact plug structure. This contact plug structure includes a metal pattern made of a first metal, and a first barrier pattern that covers the lower surface and sidewall of the metal pattern. The first barrier pattern is in contact with the metal silicide layer and is made of a second metal. The metal silicide layer itself is composed of silicon, the second metal, and a third metal that is different from the second metal.

Abstract

A semiconductor device includes a metal silicide layer on a substrate, and a contact plug structure on the metal silicide layer. The contact plug structure includes a metal pattern including a first metal, and a first barrier pattern covering a lower surface and a sidewall of the metal pattern and contacting the metal silicide layer. The first barrier pattern includes a second metal. The metal silicide layer includes silicon, the second metal, and a third metal different from the second metal.

ACTIVE RESISTOR ARRAY OF SEMICONDUCTOR MEMORY DEVICE (17883842)

Inventor Ansoo PARK

Brief explanation

The abstract describes an active resistor array in a semiconductor memory device. It includes multiple active resistors arranged in different regions, with isolation layers between them. The resistors are connected to selection transistors, which are controlled by the same gate layer. This design helps to improve the layout pattern and reduce process variation, resulting in better active resistance distribution.

Abstract

An active resistor array of a semiconductor memory device comprises a first active resistor in a first active resistor region; a second active resistor in the first active resistor region and arranged in parallel with the first active resistor, and an isolation element layer interposed therebetween; a third active resistor formed in a second active resistor region; a first selection transistor formed in a first selection transistor region and connected to the second active resistor; and a second selection transistor formed in a second selection transistor region and connected to the third active resistor. The first and second selection transistors are connected to the same gate layer. The gate layer of the first and second selection transistors is on the isolation element layer. Since example embodiments may help to ensure the uniformity of the layout pattern, active resistance distribution may be improved due to reduction in process variation.

SEMICONDUCTOR DEVICES AND DATA STORAGE SYSTEMS INCLUDING THE SAME (18062251)

Inventor Sangmin Kang

Brief explanation

The abstract describes a semiconductor device that consists of two main parts: a peripheral circuit structure and a memory cell structure. 

The peripheral circuit structure includes a first substrate, which is a base material for the device. On this substrate, there are circuit devices and a lower wiring structure that connects these devices electrically. The lower wiring structure is covered by a lower insulating layer, and on top of that, there is a diffusion barrier layer.

The memory cell structure is built on a second substrate, which is placed on top of the peripheral circuit structure. This structure has two regions: the first region and the second region. In the first region, there are gate electrodes that are stacked and spaced apart from each other in a vertical direction. These gate electrodes extend in a horizontal direction to form a staircase shape in the second region.

Each gate electrode has channel structures that penetrate it in the vertical direction. These channel structures consist of a channel layer.

The diffusion barrier layer in the peripheral circuit structure is made of a material that has lower hydrogen permeability compared to silicon nitride, which is commonly used in semiconductor devices.

Abstract

A semiconductor device includes a peripheral circuit structure including: a first substrate, circuit devices on the first substrate, a lower wiring structure electrically connected to the circuit devices, a lower insulating layer covering the lower wiring structure, and a diffusion barrier layer on the lower insulating layer; and a memory cell structure including a second substrate including first and second regions on the peripheral circuit structure, gate electrodes stacked and spaced apart from each other in a first direction perpendicular to an upper surface of the second substrate in the first region and extending in a second direction perpendicular to the first direction to form a staircase shape in the second region, and channel structures penetrating the gate electrodes in the first direction and each including a channel layer. The diffusion barrier layer includes a first material layer having a hydrogen permeability lower than a hydrogen permeability of silicon nitride.

SEMICONDUCTOR DEVICES AND DATA STORAGE SYSTEMS INCLUDING THE SAME (18070536)

Inventor Donghoon KWON

Brief explanation

This abstract describes a semiconductor device that consists of various structures. These structures include a source structure, two stack structures with gate electrodes, a dummy structure with additional gate electrodes, separation regions, channel structures, and source contact structures. The stack structures and dummy structure are spaced apart from each other, and the separation regions are spaced apart as well. The channel structures pass through the stack structures and are connected to the source structure. The source contact structures pass through the dummy structure and are connected to the source structure through the lower surface of the contact layer.

Abstract

A semiconductor device includes a source structure, first and second stack structures, including first gate electrodes stacked on the source structure to be spaced apart from each other; a dummy structure on the source structure between the first and the second stack structures, and including second gate electrodes stacked to be spaced apart from each other; first separation regions passing through the first and second stack structures, and spaced apart from each other; second separation regions extending between each of the first and second stack structures and the dummy structure; channel structures passing through the first and second stack structures, and respectively including a channel layer, connected to the source structure through the channel layer; and first source contact structures passing through the dummy structure, and respectively including a first contact layer connected to the source structure through a lower surface of the first contact layer.

SEMICONDUCTOR DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME (18150415)

Inventor Donghoon KWON

Brief explanation

The abstract describes a semiconductor device that consists of two semiconductor structures. The first structure has a substrate, and the second structure is built on top of it. The second structure includes stacked gate electrodes, insulating layers, through-insulating regions, a capping insulating layer, an upper insulating layer, channel structures, contact plugs, bit lines, and conductive patterns. The conductive patterns have connection portions that are part of the contact plugs.

Abstract

A semiconductor device includes a first semiconductor structure including a first substrate and a second semiconductor structure on the first semiconductor structure. The second semiconductor structure includes gate electrodes stacked on the second substrate, interlayer insulating layers alternately stacked with the gate electrodes, through-insulating regions passing through the gate electrodes in a second region, a capping insulating layer covering the gate electrodes and the interlayer insulating layers, an upper insulating layer on the capping insulating layer, channel structures passing through the capping insulating layer and the gate electrodes in a first region, upper contact plugs passing through the upper insulating layer, bit lines on the upper insulating layer, first contact plugs passing through the capping insulating layer, and conductive patterns including second contact plugs passing through each of the through-insulating regions in the second region. The conductive patterns include connection portions integral with the second contact plugs.

VERTICAL SEMICONDUCTOR DEVICE (18166854)

Inventor Sunggil KIM

Brief explanation

The abstract describes a vertical semiconductor device that consists of a substrate, a pattern structure, and a channel structure. The pattern structure is made up of insulation patterns and gate structures stacked vertically on the substrate. The channel structure extends vertically and includes a data storage structure, a channel, a lower pattern, and a filling insulation pattern. The channel has a cylindrical shape and the lower pattern contains silicon and germanium.

Abstract

A vertical semiconductor device may include a substrate, a pattern structure on the substrate, and a channel structure in a channel hole passing through the pattern structure. The pattern structure may include insulation patterns and gate structures alternately stacked in a vertical direction perpendicular to an upper surface of the substrate. The channel structure may extend in the vertical direction. The channel structure may include a data storage structure on an inner surface of the channel hole, a channel contacting the data storage structure, a lower pattern on the channel positioned at a lower portion of the channel hole, and a filling insulation pattern on the channel and the lower pattern. The channel may have a cylindrical shape. The lower pattern may include an oxide including silicon and germanium.

NONVOLATILE MEMORY DEVICE (18209983)

Inventor Gi Yong CHUNG

Brief explanation

The abstract describes a nonvolatile memory device that has a substrate with a cell array region. It also has a first gate electrode with an opening on the cell array region. Stacked above the first gate electrode are multiple second gate electrodes, which have convex portions that curve outward towards the substrate. There is also a word line cutting region that cuts through the opening and the convex portions.

Abstract

A nonvolatile memory device includes a substrate including a cell array region, a first gate electrode including an opening on the cell array region of the substrate, a plurality of second gate electrodes stacked above the first gate electrode and including convex portions having an outward curve extending toward the substrate, and a word line cutting region cutting the opening and the convex portions.

SEMICONDUCTOR MEMORY DEVICES HAVING STACKED STRUCTURES THEREIN THAT SUPPORT HIGH INTEGRATION (18333886)

Inventor Sangjae Lee

Brief explanation

The abstract describes a semiconductor device that consists of multiple layers stacked on top of each other. There is a channel structure that runs through these layers. The lower stack structure has two layers of electrodes - one near the interface with the upper stack structure and another in the center. Similarly, the upper stack structure also has two layers of electrodes. The thickness of the first electrode layer in either the lower or upper stack structure is greater than the second electrode layer. Additionally, there is at least one insulating layer between the first electrode layers.

Abstract

A semiconductor device includes an upper stack structure extending on a lower stack structure, which extends on an underlying substrate. A channel structure extends through the upper stack structure and the lower stack structure. The lower stack structure includes a first lower electrode layer disposed adjacent to an interface between the lower stack structure and the upper stack structure, and a second lower electrode layer disposed adjacent a center of the lower stack structure. The upper stack structure includes a first upper electrode layer disposed adjacent to the interface, and a second upper electrode layer disposed adjacent a center of the upper stack structure. At least one of the first lower electrode layer and the first upper electrode layer is thicker than the second lower electrode layer. At least one insulating layer is disposed between the first lower electrode layer and the first upper electrode layer.

ELECTRONIC DEVICE AND METHOD OF MANUFACTURING THE SAME (18332972)

Inventor Jinseong HEO

Brief explanation

The abstract describes an electronic device and a method of manufacturing it. The device consists of two separate regions on a substrate, each containing a different device. The first device has a layer with a ferroelectric domain and a gate electrode, while the second device also has a layer with a ferroelectric domain and a gate electrode. The two domain layers have different characteristics when it comes to polarization change caused by an electric field. The first domain layer exhibits a non-hysteretic behavior, meaning it does not retain any memory of its previous state, while the second domain layer exhibits a hysteretic behavior, meaning it retains memory of its previous state.

Abstract

Provided are an electronic device and a method of manufacturing the same. The electronic device may include a first device provided on a first region of a substrate; and a second device provided on a second region of the substrate, wherein the first device may include a first domain layer including a ferroelectric domain and a first gate electrode on the first domain layer, and the second device may include a second domain layer including a ferroelectric domain and a second gate electrode on the second domain layer. The first domain layer and the second domain layer may have different characteristics from each other at a polarization change according to an electric field. At the polarization change according to the electric field, the first domain layer may have substantially a non-hysteretic behavior characteristic and the second domain layer may have a hysteretic behavior characteristic.

CHALCOGENIDE MATERIAL, SWITCHING DEVICE INCLUDING THE CHALCOGENIDE MATERIAL, AND MEMORY DEVICE INCLUDING THE SWITCHING DEVICE (18176750)

Inventor Hajun SUNG

Brief explanation

The abstract describes a type of chalcogenide material that contains specific elements such as germanium, arsenic, sulfur, selenium, and a group III metal (indium, gallium, or aluminum). The material has specific composition ranges for each element, such as the content of germanium being between 10% and 30%, the content of arsenic being between 30% and 50%, the content of selenium being between 20% and 60%, the content of sulfur being between 0.5% and 10%, and the content of the group III metal being between 0.5% and 10%.

Abstract

A chalcogenide material according to one embodiment includes germanium (Ge); arsenic (As); sulfur (S); selenium (Se), and at least one group III metal selected from indium (In), gallium (Ga), and aluminum (Al), wherein the content of the Ge may be greater than about 10 at % and less than or equal to about 30 at %, the content of the As may be greater than about 30 at % and less than or equal to about 50 at %, the content of Se is greater than about 20 at % and less than or equal to about 60 at %, the content of S is greater than about 0.5 at % and less than or equal to about 10 at %, and the content of the group III metal may be in the range of 0.5 at % to 10 at %.

SEMICONDUCTOR DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME (18149929)

Inventor Bongyong LEE

Brief explanation

This abstract describes a semiconductor device that consists of two substrate structures. The first substrate structure includes a substrate, circuit elements, and bonding layers. The second substrate structure is placed on top of the first one and includes a plate layer, an insulating layer made of silicon nitride, gate electrodes, and a channel structure with a semiconductor layer. The bonding layers of the second substrate structure are connected to the bonding layers of the first substrate structure. The channel hole in the second substrate structure has two different widths, with the second portion being wider than the first portion.

Abstract

A semiconductor device may include a first substrate structure including a substrate, circuit elements on the substrate, and first bonding layers on the circuit elements, and a second substrate structure on the first substrate structure. The second substrate structure may include a plate layer, an intermediate insulating layer below the plate layer and including silicon nitride, gate electrodes below the intermediate insulating layer and stacked to be spaced apart from each other in a vertical direction, a channel structure in a channel hole passing through the intermediate insulating layer and the gate electrodes and including a semiconductor layer, and second bonding layers connected to the first bonding layers. The channel hole may have a first width in a first portion passing through the gate electrodes and a second width, wider than the first width, in a second portion passing through the intermediate insulating layer.

ORGANOMETALLIC COMPOUND, ORGANIC LIGHT-EMITTING DEVICE INCLUDING THE SAME, AND ELECTRONIC APPARATUS INCLUDING THE ORGANIC LIGHT-EMITTING DEVICE (18298794)

Inventor Ohyun Kwon

Brief explanation

The abstract describes an organometallic compound represented by Formula 1. It is a concise summary of the compound without any exaggeration or overselling.

Abstract

An organometallic compound represented by Formula 1: