Qualcomm incorporated (20240136357). OPTIMIZATION OF VERTICAL TRANSPORT FIELD EFFECT TRANSISTOR INTEGRATION simplified abstract

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OPTIMIZATION OF VERTICAL TRANSPORT FIELD EFFECT TRANSISTOR INTEGRATION

Organization Name

qualcomm incorporated

Inventor(s)

Xia Li of San Diego CA (US)

Bin Yang of San Diego CA (US)

Haining Yang of San Diego CA (US)

OPTIMIZATION OF VERTICAL TRANSPORT FIELD EFFECT TRANSISTOR INTEGRATION - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240136357 titled 'OPTIMIZATION OF VERTICAL TRANSPORT FIELD EFFECT TRANSISTOR INTEGRATION

Simplified Explanation

The abstract describes a vertical transport field effect transistor (VTFET) with multiple FET structures on a substrate, including n-type and p-type FET structures with fins to transport charge carriers vertically.

  • The VTFET includes multiple FET structures on a substrate.
  • The FET structures consist of n-type and p-type FET structures oriented in different plane directions.
  • Each FET structure has a fin with a fin height, h, for transporting charge carriers vertically along the fin height.

Potential Applications

The technology could be applied in vertical transport devices, such as high-speed transistors, memory devices, and power electronics.

Problems Solved

The VTFET addresses the need for efficient vertical charge carrier transport in semiconductor devices, enabling improved performance and functionality.

Benefits

The VTFET offers enhanced vertical charge carrier transport capabilities, potentially leading to faster and more efficient electronic devices.

Potential Commercial Applications

"Vertical Transport Field Effect Transistor (VTFET) for High-Speed Transistors and Power Electronics"

Possible Prior Art

There may be prior art related to vertical charge carrier transport in semiconductor devices, but specific examples are not provided in the abstract.

Unanswered Questions

How does the fin height impact the performance of the VTFET?

The abstract mentions the fin height as a defining factor, but it does not elaborate on how different fin heights may affect the transistor's operation.

Are there any limitations to the vertical charge carrier transport in the VTFET?

While the abstract highlights the vertical transport capability of the VTFET, it does not mention any potential limitations or challenges that may arise in practical applications.


Original Abstract Submitted

a vertical transport field effect transistor (vtfet) comprising: a plurality of fet structures on a substrate; the plurality of fet structures comprising: a first n-type fet structure oriented in a first plane direction relative to the substrate; and a first p-type fet structure oriented in a second plane direction relative to the substrate; wherein the first n-type fet structure and the first p-type fet structure each comprises a fin having a fin height, h, wherein h defines the fin height orthogonal to a surface of the substrate, each fin being configured to transport charge carriers orthogonal to the surface of the substrate along the fin height.