Nvidia corporation (20240104252). Detection of Electromagnetic Fault Injection Attacks on Digital Systems simplified abstract

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Detection of Electromagnetic Fault Injection Attacks on Digital Systems

Organization Name

nvidia corporation

Inventor(s)

Kedar Rajpathak of Bengaluru (IN)

Tezaswi Raja of Santa Clara CA (US)

Detection of Electromagnetic Fault Injection Attacks on Digital Systems - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240104252 titled 'Detection of Electromagnetic Fault Injection Attacks on Digital Systems

Simplified Explanation

The patent application describes techniques for detecting an electromagnetic (EM) fault injection attack on circuitry in a digital system.

  • The driving circuitry in the system is designed so that the logic state on the second node is more sensitive to an EM pulse than the logic state on the first node.
  • Comparison circuitry is used to detect an attack by sensing an unexpected logic state on the second node compared to the first node.

Potential Applications

The technology described in the patent application could be applied in various industries where security of digital systems is crucial, such as banking, defense, and telecommunications.

Problems Solved

This technology helps in detecting and preventing EM fault injection attacks, which can compromise the integrity and security of digital systems.

Benefits

The benefits of this technology include enhanced security of digital systems, early detection of potential attacks, and protection of sensitive information.

Potential Commercial Applications

Potential commercial applications of this technology include cybersecurity products, secure communication systems, and secure payment processing systems.

Possible Prior Art

One possible prior art in this field is the use of electromagnetic shielding techniques to protect digital systems from external interference.

What are the specific driving circuitry implementations mentioned in the patent application?

The patent application mentions that the driving circuitry is implemented in a manner where the logic state on the second node is more sensitive to an EM pulse than the logic state on the first node.

How does the comparison circuitry detect an attack in the system?

The comparison circuitry is designed to assert an attack detection output when it senses a logic state on the second node that is unexpected relative to the logic state on the first node, indicating a potential EM fault injection attack.


Original Abstract Submitted

techniques are described for detecting an electromagnetic (“em”) fault injection attack directed toward circuitry in a target digital system. in various embodiments, a first node may be coupled to first driving circuitry, and a second node may be coupled to second driving circuitry. the driving circuitry is implemented in a manner such that a logic state on the second node has greater sensitivity to an em pulse than has a logic state on the first node. comparison circuitry may be coupled to the first and to the second nodes to assert an attack detection output responsive to sensing a logic state on the second node that is unexpected relative to a logic state on the first node.