Meta platforms technologies, llc (20240095195). Artificial Reality System Having Multi-Bank, Multi-Port Distributed Shared Memory simplified abstract

From WikiPatents
Jump to navigation Jump to search

Artificial Reality System Having Multi-Bank, Multi-Port Distributed Shared Memory

Organization Name

meta platforms technologies, llc

Inventor(s)

Alok Kumar Mathur of Cupertino CA (US)

Ennio Salemi of Palo Alto CA (US)

Drew Eric Wingard of Palo Alto CA (US)

Valerio Catalano of San Francisco CA (US)

Artificial Reality System Having Multi-Bank, Multi-Port Distributed Shared Memory - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240095195 titled 'Artificial Reality System Having Multi-Bank, Multi-Port Distributed Shared Memory

Simplified Explanation

The patent application describes a system utilizing a multi-bank, multi-port shared memory system that can be part of a system on a chip, particularly useful in an artificial reality system. The shared memory system allows distributed or varied latency for memory banks and components within the system, enabling concurrent, common, and shared access to memory without requiring full locking or arbitration.

  • Multi-bank, multi-port shared memory system
  • Implemented as part of a system on a chip
  • Designed for artificial reality systems
  • Distributed or varied latency for memory banks and components
  • Enables concurrent, common, and shared memory access
  • Does not require full locking or arbitration

Potential Applications

The technology could be applied in:

  • Virtual reality systems
  • Augmented reality devices
  • Gaming consoles

Problems Solved

The system addresses issues such as:

  • Memory access bottlenecks
  • Latency in shared memory systems

Benefits

The benefits of this technology include:

  • Improved memory access speed
  • Enhanced system performance
  • Efficient memory utilization

Potential Commercial Applications

The system could find commercial use in:

  • High-performance computing
  • Embedded systems
  • Mobile devices

Possible Prior Art

One possible prior art could be:

  • Shared memory systems in multi-core processors

Unanswered Questions

How does this system handle memory conflicts?

The system likely employs a mechanism for resolving conflicts, such as prioritizing access based on certain criteria or implementing a queuing system.

What is the scalability of this shared memory system?

It is unclear from the abstract how scalable the system is in terms of adding more memory banks or components. Further details would be needed to assess its scalability potential.


Original Abstract Submitted

this disclosure describes various examples of a system which uses a multi-bank, multi-port shared memory system that may be implemented as part of a system on a chip. the shared memory system may have particular applicability in the context of an artificial reality system, and may be designed to have distributed or varied latency for one or more memory banks and/or one or more components or subsystems within the system on a chip. the described shared memory system may be logically a single entity, but physically may have multiple memory banks, each accessible by any of a number of components or subsystems. in some examples, the memory system may enable concurrent, common, and/or shared access to memory without requiring, in some situations, full locking or arbitration.