Intel corporation (20240135076). SUPER-OPTIMIZATION EXPLORER USING E-GRAPH REWRITING FOR HIGH-LEVEL SYNTHESIS simplified abstract

SUPER-OPTIMIZATION EXPLORER USING E-GRAPH REWRITING FOR HIGH-LEVEL SYNTHESIS

Organization Name

intel corporation

Inventor(s)

Jianyi Cheng of London (GB)

Samuel Coward of London (GB)

Lorenzo Chelini of Zurich (CH)

Rafael Barbalho of Orangevale CA (US)

Theo Drane of El Dorado Hills CA (US)

SUPER-OPTIMIZATION EXPLORER USING E-GRAPH REWRITING FOR HIGH-LEVEL SYNTHESIS - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240135076 titled 'SUPER-OPTIMIZATION EXPLORER USING E-GRAPH REWRITING FOR HIGH-LEVEL SYNTHESIS

Simplified Explanation

The technique described in the abstract is for automatic program code optimization for high-level synthesis. It involves receiving input in a high-level language, translating it into an intermediate language, constructing an equality graph (e-graph), exploring equivalent hardware designs through transformations, selecting a hardware design based on a cost function, extracting a representation of the selected hardware design, generating program code in the high-level language, and performing high-level synthesis using the generated code.

• Automatic program code optimization for high-level synthesis:

   - Receive input in a high-level language
   - Translate into an intermediate language
   - Construct an equality graph (e-graph)
   - Explore equivalent hardware designs through transformations
   - Select a hardware design based on a cost function
   - Extract a representation of the selected hardware design
   - Generate program code in the high-level language
   - Perform high-level synthesis using the generated code

Potential Applications

This technology can be applied in the field of electronic design automation for optimizing program code for high-level synthesis.

Problems Solved

- Streamlining the process of optimizing program code for high-level synthesis - Enhancing the efficiency and performance of hardware designs

Benefits

- Improved optimization of program code - Faster high-level synthesis process - Enhanced hardware design quality

Potential Commercial Applications

Optimizing program code for high-level synthesis in industries such as semiconductor manufacturing and electronic design.

Possible Prior Art

Prior art in the field of electronic design automation tools for optimizing hardware designs through program code transformations.

Unanswered Questions

How does this technique compare to traditional manual code optimization methods?

Answer: This article does not provide a direct comparison between this automated technique and traditional manual code optimization methods. It would be interesting to see a study or analysis on the effectiveness and efficiency of this automated approach compared to manual methods.

What impact does this technique have on the overall cost and time required for high-level synthesis?

Answer: The abstract mentions selecting a hardware design based on a cost function, but it does not delve into the specific impact on the overall cost and time required for high-level synthesis. Further research or case studies could provide insights into these aspects.

Original Abstract Submitted

described herein is a technique for automatic program code optimization for high-level synthesis. one embodiment provides a method comprising receiving input including first program code in a high-level language; translating the first program code into an intermediate language; constructing an equality graph (e-graph) from the intermediate language; interleaving control-flow, data path, and gate-level transformations to explore equivalent hardware designs represented by the e-graph; selecting a hardware design based on a cost function; extracting a representation of a selected hardware design in the intermediate language; generating second program code in the high-level language; and performing high-level synthesis using the second program code.