Intel corporation (20240126691). CRYPTOGRAPHIC SEPARATION OF MMIO ON DEVICE simplified abstract

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CRYPTOGRAPHIC SEPARATION OF MMIO ON DEVICE

Organization Name

intel corporation

Inventor(s)

Luis S. Kida of Beaverton OR (US)

Reshma Lal of Portland OR (US)

Soham Jayesh Desai of Hillsboro OR (US)

CRYPTOGRAPHIC SEPARATION OF MMIO ON DEVICE - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240126691 titled 'CRYPTOGRAPHIC SEPARATION OF MMIO ON DEVICE

Simplified Explanation

The patent application describes technologies for cryptographic separation of memory-mapped I/O operations with an accelerator device. Here is a simplified explanation of the abstract:

  • A computing device with a processor and an accelerator establishes a trusted execution environment.
  • The accelerator determines a memory address range for a memory-mapped I/O transaction and generates an authentication tag using a cryptographic key associated with that range.
  • An accelerator validator checks if the generated authentication tag matches the expected tag.
  • A memory mapper commits the memory-mapped I/O transaction if the authentication tags match.

Potential Applications

This technology could be applied in secure data processing systems, cryptographic accelerators, and hardware security modules.

Problems Solved

This technology helps prevent unauthorized access to memory-mapped I/O operations, ensuring data integrity and security in computing systems.

Benefits

The technology enhances the security of memory-mapped I/O transactions, protects sensitive data, and ensures the integrity of communication between the processor and accelerator.

Potential Commercial Applications

One potential commercial application of this technology could be in the development of secure data processing systems for industries such as finance, healthcare, and government.

Possible Prior Art

One possible prior art for this technology could be the use of cryptographic keys and authentication tags in secure communication protocols between computing devices.

Unanswered Questions

How does this technology impact system performance?

This article does not provide information on the potential impact of implementing this technology on the overall performance of the computing system.

Are there any compatibility issues with existing hardware or software?

The article does not address whether there are any compatibility issues that may arise when integrating this technology with existing hardware or software systems.


Original Abstract Submitted

technologies for cryptographic separation of mmio operations with an accelerator device include a computing device having a processor and an accelerator. the processor establishes a trusted execution environment. the accelerator determines, based on a target memory address, a first memory address range associated with the memory-mapped i/o transaction, generates a second authentication tag using a first cryptographic key from a set of cryptographic keys, wherein the first key is uniquely associated with the first memory address range. an accelerator validator determines whether the first authentication tag matches the second authentication tag, and a memory mapper commits the memory-mapped i/o transaction in response to a determination that the first authentication tag matches the second authentication tag. other embodiments are described and claimed.