Intel corporation (20240126519). PROGRAM ANALYSIS, DESIGN SPACE EXPLORATION AND VERIFICATION FOR HIGH-LEVEL SYNTHESIS VIA E-GRAPH REWRITING simplified abstract

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PROGRAM ANALYSIS, DESIGN SPACE EXPLORATION AND VERIFICATION FOR HIGH-LEVEL SYNTHESIS VIA E-GRAPH REWRITING

Organization Name

intel corporation

Inventor(s)

Jianyi Cheng of London (GB)

Samuel Coward of London (GB)

Lorenzo Chelini of Zurich (CH)

Rafael Barbalho of Orangevale CA (US)

Theo Drane of El Dorado Hills CA (US)

PROGRAM ANALYSIS, DESIGN SPACE EXPLORATION AND VERIFICATION FOR HIGH-LEVEL SYNTHESIS VIA E-GRAPH REWRITING - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240126519 titled 'PROGRAM ANALYSIS, DESIGN SPACE EXPLORATION AND VERIFICATION FOR HIGH-LEVEL SYNTHESIS VIA E-GRAPH REWRITING

Simplified Explanation

The technique and tool described in the abstract of the patent application focus on automatic program code optimization for high-level synthesis. The tool efficiently explores multiple representations of an input program using e-graph rewriting and determines an HLS-efficient representation of program code for input into high-level synthesis tools.

  • The tool utilizes e-graph rewriting to explore various representations of an input program.
  • It focuses on determining an HLS-efficient representation of program code for high-level synthesis.
  • The technique aims to optimize program code automatically for better synthesis results.

Potential Applications

The technology can be applied in various fields such as:

  • High-level synthesis
  • Compiler optimization
  • Software development

Problems Solved

The technology addresses the following issues:

  • Manual optimization of program code for high-level synthesis
  • Inefficient representation of program code for synthesis tools
  • Limited exploration of different program representations

Benefits

The benefits of this technology include:

  • Automated program code optimization
  • Improved efficiency in high-level synthesis
  • Enhanced performance of synthesized hardware

Potential Commercial Applications

The technology can be commercially applied in industries such as:

  • Semiconductor design
  • Embedded systems development
  • FPGA programming

Possible Prior Art

Prior art in this field may include:

  • Existing high-level synthesis optimization tools
  • Research on e-graph rewriting techniques
  • Patents related to compiler optimization

Unanswered Questions

How does this technology compare to existing high-level synthesis optimization tools?

This article does not provide a direct comparison between this technology and existing high-level synthesis optimization tools. Further research or a comparative analysis would be needed to determine the specific advantages and differences.

What are the specific limitations or constraints of using e-graph rewriting for program code optimization?

The article does not delve into the limitations or constraints of using e-graph rewriting for program code optimization. Understanding these factors could provide insights into the practical application and effectiveness of the proposed technique.


Original Abstract Submitted

described herein is a technique and associated tool for automatic program code optimization for high-level synthesis. the tool can efficiently explore multiple representations of an input program using e-graph rewriting and determine an hls-efficient representation of program code for input into high-level synthesis tools.