Intel corporation (20240113158). HIGH SURFACE AREA CAPACITOR IN AN ELECTRONIC SUBSTRATE PACKAGE simplified abstract

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HIGH SURFACE AREA CAPACITOR IN AN ELECTRONIC SUBSTRATE PACKAGE

Organization Name

intel corporation

Inventor(s)

Jeremy D. Ecton of Gilbert AZ (US)

Brandon C. Marin of Gilbert AZ (US)

Haobo Chen of Chandler AZ (US)

Changhua Liu of Chandler AZ (US)

Srinivas Venkata Ramanuja Pietambaram of Chandler AZ (US)

HIGH SURFACE AREA CAPACITOR IN AN ELECTRONIC SUBSTRATE PACKAGE - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240113158 titled 'HIGH SURFACE AREA CAPACITOR IN AN ELECTRONIC SUBSTRATE PACKAGE

Simplified Explanation

The patent application describes microelectronics package architectures that incorporate high surface area capacitors within the substrate packages. The substrates contain anode, cathode, and conductive materials, with the anode and cathode surfaces featuring peaks and valleys that interlock. The conductive material is situated at the anode peaks.

  • Anode, cathode, and conductive materials are used in the substrate packages.
  • Anode and cathode surfaces have peaks and valleys that interlock.
  • Conductive material is located at the anode peaks.

Potential Applications

The technology could be applied in various microelectronics devices, such as sensors, actuators, and communication systems.

Problems Solved

This innovation addresses the need for compact and efficient microelectronics package architectures with high surface area capacitors.

Benefits

The technology enables improved performance and miniaturization of microelectronics devices, leading to enhanced functionality and reliability.

Potential Commercial Applications

The technology could be utilized in the development of advanced consumer electronics, medical devices, and automotive systems.

Possible Prior Art

One potential prior art could be the use of traditional capacitors in microelectronics packages, which may not offer the same high surface area benefits as the described architecture.

Unanswered Questions

1. How does the integration of high surface area capacitors impact the overall size and weight of microelectronics devices? 2. What specific manufacturing processes are involved in creating the in-situ high surface area capacitors within the substrate packages?


Original Abstract Submitted

disclosed herein are microelectronics package architectures utilizing in-situ high surface area capacitor in substrate packages and methods of manufacturing the same. the substrates may include an anode material, a cathode material, and a conductive material. the anode material may have an anode surface that may define a plurality of anode peaks and anode valleys. the cathode material may have a cathode surface that may define a plurality of cathode peaks and cathode valleys complementary to the plurality of anode peaks and anode valleys. the conductive material may be located at the anode peaks.