Intel corporation (20240113052). SEMICONDUCTOR PACKAGES WITH ANTENNAS simplified abstract

SEMICONDUCTOR PACKAGES WITH ANTENNAS

Organization Name

intel corporation

Inventor(s)

Telesphor Kamgaing of Chandler AZ (US)

Adel A. Elsherbini of Chandler AZ (US)

Sasha Oster of Chandler AZ (US)

SEMICONDUCTOR PACKAGES WITH ANTENNAS - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240113052 titled 'SEMICONDUCTOR PACKAGES WITH ANTENNAS

Simplified Explanation

The patent application is about systems and methods for fabricating a coreless semiconductor package, such as a millimeter-wave antenna package, with an asymmetric build-up layer count that can be fabricated on both sides of a temporary substrate. This design reduces the overall layer count, leading to cost reduction in fabrication. Additionally, dummification elements near antenna layers can reduce image current, increasing antenna gain and efficiency.

• Coreless semiconductor package fabrication with asymmetric build-up layer count:

   - Fabricated on both sides of a temporary substrate
   - Reduces overall layer count
   - Contributes to cost reduction in fabrication

• Dummification elements near antenna layers:

   - Reduce image current
   - Increase antenna gain and efficiency

Potential Applications

The technology can be applied in the manufacturing of millimeter-wave antenna packages, high-frequency communication devices, and other semiconductor packages requiring reduced layer count and improved antenna performance.

Problems Solved

1. High fabrication costs due to a high layer count in semiconductor packages. 2. Reduced antenna gain and efficiency caused by image current near antenna layers.

Benefits

1. Cost reduction in semiconductor package fabrication. 2. Improved antenna gain and efficiency in millimeter-wave antenna packages.

Potential Commercial Applications

Optimizing the fabrication process of semiconductor packages can benefit companies in the telecommunications, aerospace, and automotive industries looking to improve the performance of high-frequency communication devices.

Possible Prior Art

One possible prior art could be the use of dummification elements in semiconductor packages to reduce image current and improve antenna performance. However, the specific implementation of an asymmetric build-up layer count on both sides of a temporary substrate to reduce overall layer count may be a novel aspect of this technology.

Unanswered Questions

How does the asymmetric build-up layer count affect the overall size and weight of the semiconductor package?

The abstract does not provide information on how the reduction in layer count impacts the physical characteristics of the package.

Are there any limitations or drawbacks to using dummification elements near antenna layers?

The abstract does not mention any potential limitations or drawbacks of incorporating dummification elements in semiconductor packages.

Original Abstract Submitted

in various embodiments, disclosed herein are systems and methods directed to the fabrication of a coreless semiconductor package (e.g., a millimeter (mm)-wave antenna package) having an asymmetric build-up layer count that can be fabricated on both sides of a temporary substrate (e.g., a core). the asymmetric build-up layer count can reduce the overall layer count in the fabrication of the semiconductor package and can therefore contribute to fabrication cost reduction. in further embodiments, the semiconductor package (e.g., a millimeter (mm)-wave antenna packages) can further comprise dummification elements disposed near one or more antenna layers. further, the dummification elements disposed near one or more antenna layers can reduce image current and thereby increasing the antenna gain and efficiency.