Intel corporation (20240105852). TOP-GATE DOPED THIN FILM TRANSISTOR simplified abstract

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TOP-GATE DOPED THIN FILM TRANSISTOR

Organization Name

intel corporation

Inventor(s)

Abhishek A. Sharma of Portland OR (US)

Sean T. Ma of Portland OR (US)

Van H. Le of Beaverton OR (US)

Jack T. Kavalieros of Portland OR (US)

Gilbert Dewey of Beaverton OR (US)

TOP-GATE DOPED THIN FILM TRANSISTOR - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240105852 titled 'TOP-GATE DOPED THIN FILM TRANSISTOR

Simplified Explanation

The abstract describes a top-gate thin film transistor (TFT) structure that addresses contact resistance issues commonly found in such configurations. The TFT includes a semiconductor layer doped with dopant elements, a gate dielectric layer, a gate electrode, and one or more contacts and/or gate spacers. The semiconductor layer is doped with dopant elements beneath the gate dielectric layer, contacts, and/or gate spacers.

  • Semiconductor layer doped with dopant elements
  • Gate dielectric layer on the semiconductor layer
  • Gate electrode on the gate dielectric layer
  • Doping of semiconductor layer beneath gate dielectric layer, contacts, and/or gate spacers

Potential Applications

The technology can be applied in the manufacturing of high-performance thin film transistors for various electronic devices such as displays, sensors, and integrated circuits.

Problems Solved

The innovation addresses contact resistance issues in top-gate thin film transistor structures, improving overall device performance and reliability.

Benefits

- Enhanced conductivity and performance of thin film transistors - Improved reliability and longevity of electronic devices - Potential for higher efficiency and functionality in electronic applications

Potential Commercial Applications

"Improving Thin Film Transistor Performance for Advanced Electronics"

Possible Prior Art

There may be prior art related to the optimization of thin film transistor structures to reduce contact resistance and improve overall device performance.

Unanswered Questions

How does this technology compare to other solutions for contact resistance in thin film transistors?

This article does not provide a direct comparison with other solutions or technologies addressing contact resistance in thin film transistors.

What are the specific dopant elements used in the semiconductor layer and how do they impact device performance?

The article does not specify the dopant elements used or their specific effects on the performance of the thin film transistors.


Original Abstract Submitted

top-gate thin film transistor (tfts) structures. thin film transistors when in the top-gate configuration suffer from contact resistance. an example tft includes a semiconductor layer doped with one or more dopant elements. a gate dielectric layer is on the semiconductor layer, and a gate electrode is on the gate dielectric layer. the semiconductor layer is doped with the one or more dopant elements beneath the gate dielectric layer. the tft may further include one or more contacts and/or one or more gate spacers, and the semiconductor layer may further be doped with the one or more dopant elements beneath the contact(s) and/or gate spacer(s).