Intel corporation (20240105625). OPEN CAVITY INTERCONNECTS FOR MIB CONNECTIONS simplified abstract

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OPEN CAVITY INTERCONNECTS FOR MIB CONNECTIONS

Organization Name

intel corporation

Inventor(s)

Brandon C. Marin of Gilbert AZ (US)

Kristof Darmawikarta of Chandler AZ (US)

Benjamin Duong of Phoenix AZ (US)

Srinivas Venkata Ramanuja Pietambaram of Chandler AZ (US)

Gang Duan of Chandler AZ (US)

OPEN CAVITY INTERCONNECTS FOR MIB CONNECTIONS - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240105625 titled 'OPEN CAVITY INTERCONNECTS FOR MIB CONNECTIONS

Simplified Explanation

The patent application describes microelectronics package architectures utilizing open cavity interconnects for multi-die interconnect bridges and methods of manufacturing the same.

  • The microelectronics packages consist of a substrate, a first die, a solder resist layer, a first pad, and a bridge.
  • The substrate has a substrate surface, while the solder resist layer is connected to the substrate and defines an opening.
  • The first pad protrudes from the substrate surface, and the bridge is located partially within the opening between the first die and the substrate.
  • The bridge includes a first via that forms a first electrical pathway from the first pad to the first die.

Potential Applications

This technology could be applied in:

  • Advanced microelectronics packaging
  • High-density interconnect solutions

Problems Solved

This technology helps in:

  • Improving interconnect density
  • Enhancing electrical pathways in microelectronics packages

Benefits

The benefits of this technology include:

  • Increased efficiency in multi-die interconnect bridges
  • Enhanced reliability in microelectronics packaging

Potential Commercial Applications

The potential commercial applications of this technology could be in:

  • Semiconductor industry
  • Electronics manufacturing sector

Possible Prior Art

One possible prior art could be the use of traditional wire bonding techniques in microelectronics packaging.

Unanswered Questions

How does this technology impact the overall cost of microelectronics packaging?

The cost implications of implementing this technology are not discussed in the patent application.

What are the environmental considerations of using open cavity interconnects in microelectronics packaging?

The environmental impact of this technology is not addressed in the patent application.


Original Abstract Submitted

disclosed herein are microelectronics package architectures utilizing open cavity interconnects for multi-die interconnect bridges and methods of manufacturing the same. the microelectronics packages may include a substrate, a first die, a solder resist layer, a first pad, and a bridge. the substrate may have a substrate surface. the solder resist layer may be connected to the substrate and may define an opening. the first pad may protrude from the substrate surface. the bridge may be located at least partially within the opening and in between the first die and the substrate. the bridge may include a first via that forms a first electrical pathway from the first pad to the first die.