Intel corporation (20240104027). TEMPORAL INFORMATION LEAKAGE PROTECTION MECHANISM FOR CRYPTOGRAPHIC COMPUTING simplified abstract

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TEMPORAL INFORMATION LEAKAGE PROTECTION MECHANISM FOR CRYPTOGRAPHIC COMPUTING

Organization Name

intel corporation

Inventor(s)

Santosh Ghosh of Hillsboro OR (US)

Christoph Dobraunig of St. Veit an der Glan (AT)

Michael Lemay of Hillsboro OR (US)

David M. Durham of Beaverton OR (US)

TEMPORAL INFORMATION LEAKAGE PROTECTION MECHANISM FOR CRYPTOGRAPHIC COMPUTING - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240104027 titled 'TEMPORAL INFORMATION LEAKAGE PROTECTION MECHANISM FOR CRYPTOGRAPHIC COMPUTING

Simplified Explanation

The processor described in the patent application includes a core with cryptographic computing circuitry that encrypts and decrypts data using both a stream cipher and a block cipher, storing the encrypted data in a cache.

  • The processor includes a core with cryptographic computing circuitry.
  • Encryption and decryption are based on both a stream cipher and a block cipher.
  • Encrypted data is stored in the cache.
  • Encryption involves providing the output of the stream cipher to the block cipher.
  • Decryption involves providing the output of the block cipher to the stream cipher.

Potential Applications

This technology could be applied in secure data processing, such as in financial transactions, secure communications, and data storage.

Problems Solved

This technology helps in securing sensitive data by encrypting and decrypting it using advanced cryptographic techniques, protecting it from unauthorized access or tampering.

Benefits

The processor provides enhanced security for data processing tasks, ensuring the confidentiality and integrity of the information being processed.

Potential Commercial Applications

"Secure Data Processing with Advanced Cryptographic Techniques"

Possible Prior Art

There may be prior art related to processors with cryptographic capabilities, but specific examples are not provided in the abstract.

Unanswered Questions

How does the processor handle key management for encryption and decryption?

The abstract does not mention the specifics of key management for the encryption and decryption processes.

What impact does the use of both a stream cipher and a block cipher have on performance?

The abstract does not address how the combination of these two types of ciphers affects the processor's performance in terms of speed and efficiency.


Original Abstract Submitted

in one embodiment, a processor includes a cache and a core. the core includes an execution unit and cryptographic computing circuitry to encrypt plaintext data output by the execution unit and store the encrypted data in the cache and decrypt encrypted data accessed from the cache and provide the decrypted data to the execution unit for processing. the encryption and decryption are based on both a stream cipher and a block cipher. in some embodiments, the encryption is based on providing an output of the stream cipher to the block cipher and the decryption is based on providing an output of the block cipher to the stream cipher.