Difference between revisions of "Intel Corporation patent applications published on April 18th, 2024"

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'''Summary of the patent applications from Intel Corporation on April 18th, 2024'''
+
==Patent applications for Intel Corporation on April 18th, 2024==
  
−
Intel Corporation has recently filed patents for innovative technologies related to flexible power distribution systems, wireless sensor networks, and single-radio multi-channel medium access in wireless networks.
+
===MAGNET-DRIVEN CHEMICAL-MECHANICAL POLISHING ([[Intel Corporation (17966021). MAGNET-DRIVEN CHEMICAL-MECHANICAL POLISHING simplified abstract|17966021]])===
  
−
Summary:
 
−
- The first patent application describes a flexible three-dimensional power plane in a chassis using a flexible ribbon cable secured to a circuit board tray with power bosses for efficient power distribution.
 
−
- The second patent application focuses on wireless sensor networks, including device onboarding, network association, data logging, asset tracking, and automated flight state detection.
 
−
- The third patent application introduces a system for single-radio multi-channel medium access in an overlapping basic service set, addressing channel congestion and interference in wireless networks.
 
  
−
Notable Applications:
+
'''Main Inventor'''
−
- Flexible power distribution systems for servers, computers, and electronic equipment.
+
 
−
- Wireless sensor networks for industries like agriculture, manufacturing, healthcare, and transportation.
+
Yosef KORNBLUTH
−
- Single-radio multi-channel medium access for wireless communication systems, IoT devices, and smart home automation.
+
 
 +
 
 +
===ROBOT MOVEMENT APPARATUS AND RELATED METHODS ([[Intel Corporation (18492458). ROBOT MOVEMENT APPARATUS AND RELATED METHODS simplified abstract|18492458]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Zhongxuan Liu
 +
 
 +
 
 +
===POWER BUDGETING FOR COMPUTER PERIPHERALS ([[Intel Corporation (18399224). POWER BUDGETING FOR COMPUTER PERIPHERALS simplified abstract|18399224]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Kunal Shah
 +
 
 +
 
 +
===HYPERSCALE POWER CONTROL FOR IMPROVED DATACENTER UTILIZATION ([[Intel Corporation (17965698). HYPERSCALE POWER CONTROL FOR IMPROVED DATACENTER UTILIZATION simplified abstract|17965698]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Sheshaprasad KRISHNAPURA
 +
 
 +
 
 +
===POWER OPTIMIZED BLEND ([[Intel Corporation (18390404). POWER OPTIMIZED BLEND simplified abstract|18390404]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Theo Drane
 +
 
 +
 
 +
===FLOATING-POINT DECOMPOSITION CIRCUITRY WITH DYNAMIC PRECISION ([[Intel Corporation (18399381). FLOATING-POINT DECOMPOSITION CIRCUITRY WITH DYNAMIC PRECISION simplified abstract|18399381]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Roberto DiCecco
 +
 
 +
 
 +
===PROGRAM ANALYSIS, DESIGN SPACE EXPLORATION AND VERIFICATION FOR HIGH-LEVEL SYNTHESIS VIA E-GRAPH REWRITING ([[Intel Corporation (18396321). PROGRAM ANALYSIS, DESIGN SPACE EXPLORATION AND VERIFICATION FOR HIGH-LEVEL SYNTHESIS VIA E-GRAPH REWRITING simplified abstract|18396321]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Jianyi Cheng
 +
 
 +
 
 +
===METHODS AND APPARATUS TO COMPILE PORTABLE CODE FOR SPECIFIC HARDWARE ([[Intel Corporation (18399033). METHODS AND APPARATUS TO COMPILE PORTABLE CODE FOR SPECIFIC HARDWARE simplified abstract|18399033]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Fabian Oboril
 +
 
 +
 
 +
===INSTRUCTIONS FOR FUSED MULTIPLY-ADD OPERATIONS WITH VARIABLE PRECISION INPUT OPERANDS ([[Intel Corporation (18399578). INSTRUCTIONS FOR FUSED MULTIPLY-ADD OPERATIONS WITH VARIABLE PRECISION INPUT OPERANDS simplified abstract|18399578]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Dipankar DAS
 +
 
 +
 
 +
===SYSTEMS AND METHODS FOR PERFORMING 16-BIT FLOATING-POINT MATRIX DOT PRODUCT INSTRUCTIONS ([[Intel Corporation (18397664). SYSTEMS AND METHODS FOR PERFORMING 16-BIT FLOATING-POINT MATRIX DOT PRODUCT INSTRUCTIONS simplified abstract|18397664]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Alexander F. HEINECKE
 +
 
 +
 
 +
===SYSTEMS AND METHODS FOR EXECUTING A FUSED MULTIPLY-ADD INSTRUCTION FOR COMPLEX NUMBERS ([[Intel Corporation (18399473). SYSTEMS AND METHODS FOR EXECUTING A FUSED MULTIPLY-ADD INSTRUCTION FOR COMPLEX NUMBERS simplified abstract|18399473]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Roman S. Dubtsov
 +
 
 +
 
 +
===SYSTEMS FOR PERFORMING INSTRUCTIONS TO QUICKLY CONVERT AND USE TILES AS 1D VECTORS ([[Intel Corporation (18399014). SYSTEMS FOR PERFORMING INSTRUCTIONS TO QUICKLY CONVERT AND USE TILES AS 1D VECTORS simplified abstract|18399014]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Bret TOLL
 +
 
 +
 
 +
===CONFIGURING AND DYNAMICALLY RECONFIGURING CHAINS OF ACCELERATORS ([[Intel Corporation (17967756). CONFIGURING AND DYNAMICALLY RECONFIGURING CHAINS OF ACCELERATORS simplified abstract|17967756]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Saurabh GAYEN
 +
 
 +
 
 +
===Apparatus, Device, Method, Computer Program and Computer System for Determining Presence of a Noisy Neighbor Virtual Machine ([[Intel Corporation (18394677). Apparatus, Device, Method, Computer Program and Computer System for Determining Presence of a Noisy Neighbor Virtual Machine simplified abstract|18394677]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Mona MINAKSHI
 +
 
 +
 
 +
===METHODS AND APPARATUS TO MANAGE WORKLOADS FOR AN OPERATING SYSTEM ([[Intel Corporation (18396350). METHODS AND APPARATUS TO MANAGE WORKLOADS FOR AN OPERATING SYSTEM simplified abstract|18396350]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Leslie Xu
 +
 
 +
 
 +
===CHAINED ACCELERATOR OPERATIONS ([[Intel Corporation (17967740). CHAINED ACCELERATOR OPERATIONS simplified abstract|17967740]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Saurabh GAYEN
 +
 
 +
 
 +
===PREDICTIVE WORKLOAD ORCHESTRATION FOR DISTRIBUTED COMPUTING ENVIRONMENTS ([[Intel Corporation (18538364). PREDICTIVE WORKLOAD ORCHESTRATION FOR DISTRIBUTED COMPUTING ENVIRONMENTS simplified abstract|18538364]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Sundar Nadathur
 +
 
 +
 
 +
===Method and system for dynamically detecting memory sub-channel mapping and data lane mapping between a memory controller and physical layer circuitry ([[Intel Corporation (18539350). Method and system for dynamically detecting memory sub-channel mapping and data lane mapping between a memory controller and physical layer circuitry simplified abstract|18539350]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Zhiguo WEI
 +
 
 +
 
 +
===CRYPTOGRAPHIC SEPARATION OF MMIO ON DEVICE ([[Intel Corporation (18462605). CRYPTOGRAPHIC SEPARATION OF MMIO ON DEVICE simplified abstract|18462605]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Luis S. Kida
 +
 
 +
 
 +
===METHOD AND APPARATUS TO USE DRAM AS A CACHE FOR SLOW BYTE-ADDRESSIBLE MEMORY FOR EFFICIENT CLOUD APPLICATIONS ([[Intel Corporation (18392310). METHOD AND APPARATUS TO USE DRAM AS A CACHE FOR SLOW BYTE-ADDRESSIBLE MEMORY FOR EFFICIENT CLOUD APPLICATIONS simplified abstract|18392310]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Yao Zu DONG
 +
 
 +
 
 +
===HARDWARE PROCESSOR CORE HAVING A MEMORY SLICED BY LINEAR ADDRESS ([[Intel Corporation (17949803). HARDWARE PROCESSOR CORE HAVING A MEMORY SLICED BY LINEAR ADDRESS simplified abstract|17949803]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Mark Dechene
 +
 
 +
 
 +
===AUTOMATED DETECTION OF CASE-SPLITTING OPPORTUNITIES IN RTL ([[Intel Corporation (18395066). AUTOMATED DETECTION OF CASE-SPLITTING OPPORTUNITIES IN RTL simplified abstract|18395066]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Samuel Coward
 +
 
 +
 
 +
===SEMI-AUTOMATIC TOOL TO CREATE FORMAL VERIFICATION MODELS ([[Intel Corporation (18394854). SEMI-AUTOMATIC TOOL TO CREATE FORMAL VERIFICATION MODELS simplified abstract|18394854]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Disha Puri
 +
 
 +
 
 +
===GRAPH NEURAL NETWORK MODEL FOR NEURAL NETWORK SCHEDULING DECISIONS ([[Intel Corporation (18394307). GRAPH NEURAL NETWORK MODEL FOR NEURAL NETWORK SCHEDULING DECISIONS simplified abstract|18394307]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Hamza Yous
 +
 
 +
 
 +
===VIDEO SUMMARIZATION USING SEMANTIC INFORMATION ([[Intel Corporation (18510354). VIDEO SUMMARIZATION USING SEMANTIC INFORMATION simplified abstract|18510354]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Myung Hwangbo
 +
 
 +
 
 +
===SYSTEMS AND METHODS FOR AN ACCELERATED AND ENHANCED TUNING OF A MODEL BASED ON PRIOR MODEL TUNING DATA ([[Intel Corporation (18397909). SYSTEMS AND METHODS FOR AN ACCELERATED AND ENHANCED TUNING OF A MODEL BASED ON PRIOR MODEL TUNING DATA simplified abstract|18397909]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Michael McCourt
 +
 
 +
 
 +
===METHODS AND DEVICES FOR ITEM TRACKING IN CLOSED ENVIRONMENTS ([[Intel Corporation (18398207). METHODS AND DEVICES FOR ITEM TRACKING IN CLOSED ENVIRONMENTS simplified abstract|18398207]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Rita H. WOUHAYBI
 +
 
 +
 
 +
===IMAGE PROCESSING TECHNOLOGIES ([[Intel Corporation (17967666). IMAGE PROCESSING TECHNOLOGIES simplified abstract|17967666]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Narifumi IWAMOTO
 +
 
 +
 
 +
===CHAINED ACCELERATOR OPERATIONS WITH STORAGE FOR INTERMEDIATE RESULTS ([[Intel Corporation (17967768). CHAINED ACCELERATOR OPERATIONS WITH STORAGE FOR INTERMEDIATE RESULTS simplified abstract|17967768]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Christopher J. HUGHES
 +
 
 +
 
 +
===METHODS AND APPARATUS TO IMPLEMENT SUPER-RESOLUTION UPSCALING FOR DISPLAY DEVICES ([[Intel Corporation (18397751). METHODS AND APPARATUS TO IMPLEMENT SUPER-RESOLUTION UPSCALING FOR DISPLAY DEVICES simplified abstract|18397751]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Petrus Van Beek
 +
 
 +
 
 +
===ADAPTIVE DEFORMABLE KERNEL PREDICTION NETWORK FOR IMAGE DE-NOISING ([[Intel Corporation (18514252). ADAPTIVE DEFORMABLE KERNEL PREDICTION NETWORK FOR IMAGE DE-NOISING simplified abstract|18514252]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Anbang Yao
 +
 
 +
 
 +
===SYSTEMS AND METHODS FOR TONE MAPPING OF HIGH DYNAMIC RANGE IMAGES FOR HIGH-QUALITY DEEP LEARNING BASED PROCESSING ([[Intel Corporation (18491533). SYSTEMS AND METHODS FOR TONE MAPPING OF HIGH DYNAMIC RANGE IMAGES FOR HIGH-QUALITY DEEP LEARNING BASED PROCESSING simplified abstract|18491533]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Attila Tamas Afra
 +
 
 +
 
 +
===TECHNOLOGIES FOR FUSING DATA FROM MULTIPLE SENSORS TO IMPROVE OBJECT DETECTION, IDENTIFICATION, AND LOCALIZATION ([[Intel Corporation (18528424). TECHNOLOGIES FOR FUSING DATA FROM MULTIPLE SENSORS TO IMPROVE OBJECT DETECTION, IDENTIFICATION, AND LOCALIZATION simplified abstract|18528424]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Soila Kavulya
 +
 
 +
 
 +
===SYSTEMS AND METHODS FOR PROVIDING NON-LEXICAL CUES IN SYNTHESIZED SPEECH ([[Intel Corporation (18491266). SYSTEMS AND METHODS FOR PROVIDING NON-LEXICAL CUES IN SYNTHESIZED SPEECH simplified abstract|18491266]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Jessica M. Christian
 +
 
 +
 
 +
===DECOUPLING CAPACITORS BASED ON DUMMY THROUGH-SILICON-VIAS ([[Intel Corporation (18396922). DECOUPLING CAPACITORS BASED ON DUMMY THROUGH-SILICON-VIAS simplified abstract|18396922]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Changyok Park
 +
 
 +
 
 +
===EMBEDDED DIE ARCHITECTURE AND METHOD OF MAKING ([[Intel Corporation (18392368). EMBEDDED DIE ARCHITECTURE AND METHOD OF MAKING simplified abstract|18392368]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Robert L. Sankman
 +
 
 +
 
 +
===MICROELECTRONICS PACKAGE COMPRISING A PACKAGE-ON-PACKAGE (POP) ARCHITECTURE WITH INKJET BARRIER MATERIAL FOR CONTROLLING BONDLINE THICKNESS AND POP ADHESIVE KEEP OUT ZONE ([[Intel Corporation (18399205). MICROELECTRONICS PACKAGE COMPRISING A PACKAGE-ON-PACKAGE (POP) ARCHITECTURE WITH INKJET BARRIER MATERIAL FOR CONTROLLING BONDLINE THICKNESS AND POP ADHESIVE KEEP OUT ZONE simplified abstract|18399205]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Elizabeth NOFEN
 +
 
 +
 
 +
===NESTED ARCHITECTURES FOR ENHANCED HETEROGENEOUS INTEGRATION ([[Intel Corporation (18397906). NESTED ARCHITECTURES FOR ENHANCED HETEROGENEOUS INTEGRATION simplified abstract|18397906]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Ravindranath MAHAJAN
 +
 
 +
 
 +
===PACKAGE SUBSTRATE WITH DUAL DAMASCENE BASED SELF-ALIGNED VIAS ([[Intel Corporation (18047033). PACKAGE SUBSTRATE WITH DUAL DAMASCENE BASED SELF-ALIGNED VIAS simplified abstract|18047033]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Jeremy Ecton
 +
 
 +
 
 +
===METHOD TO IMPLEMENT WAFER-LEVEL CHIP-SCALE PACKAGES WITH GROUNDED CONFORMAL SHIELD ([[Intel Corporation (18397898). METHOD TO IMPLEMENT WAFER-LEVEL CHIP-SCALE PACKAGES WITH GROUNDED CONFORMAL SHIELD simplified abstract|18397898]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Gianni SIGNORINI
 +
 
 +
 
 +
===HETEROGENEOUS NESTED INTERPOSER PACKAGE FOR IC CHIPS ([[Intel Corporation (18397915). HETEROGENEOUS NESTED INTERPOSER PACKAGE FOR IC CHIPS simplified abstract|18397915]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Debendra MALLIK
 +
 
 +
 
 +
===ASSEMBLY OF 2XD MODULE USING HIGH DENSITY INTERCONNECT BRIDGES ([[Intel Corporation (18399220). ASSEMBLY OF 2XD MODULE USING HIGH DENSITY INTERCONNECT BRIDGES simplified abstract|18399220]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Bernd WAIDHAS
 +
 
 +
 
 +
===PACKAGE ARCHITECTURE WITH GLASS CORE SUBSTRATE HAVING INTEGRATED INDUCTORS ([[Intel Corporation (18046635). PACKAGE ARCHITECTURE WITH GLASS CORE SUBSTRATE HAVING INTEGRATED INDUCTORS simplified abstract|18046635]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Brandon C. Marin
 +
 
 +
 
 +
===LASER ABLATION-BASED SURFACE PROPERTY MODIFICATION AND CONTAMINATION REMOVAL ([[Intel Corporation (18399178). LASER ABLATION-BASED SURFACE PROPERTY MODIFICATION AND CONTAMINATION REMOVAL simplified abstract|18399178]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Denis MYASISHCHEV
 +
 
 +
 
 +
===MICROELECTRONIC ASSEMBLIES ([[Intel Corporation (18397873). MICROELECTRONIC ASSEMBLIES simplified abstract|18397873]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Adel A. Elsherbini
 +
 
 +
 
 +
===MULTI-CHIP PACKAGING ([[Intel Corporation (18397891). MULTI-CHIP PACKAGING simplified abstract|18397891]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Robert L. SANKMAN
 +
 
 +
 
 +
===VOLTAGE REGULATOR CIRCUIT INCLUDING ONE OR MORE THIN-FILM TRANSISTORS ([[Intel Corporation (18396360). VOLTAGE REGULATOR CIRCUIT INCLUDING ONE OR MORE THIN-FILM TRANSISTORS simplified abstract|18396360]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Abhishek A. SHARMA
 +
 
 +
 
 +
===INTEGRATED CIRCUIT CONTACT STRUCTURES ([[Intel Corporation (18396174). INTEGRATED CIRCUIT CONTACT STRUCTURES simplified abstract|18396174]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Patrick Morrow
 +
 
 +
 
 +
===HARDWARE ACCELERATION OF DATA REDUCTION OPERATIONS ([[Intel Corporation (18397651). HARDWARE ACCELERATION OF DATA REDUCTION OPERATIONS simplified abstract|18397651]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Smita Kumar
 +
 
 +
 
 +
===APPARATUS, SYSTEM AND METHOD OF AN ORTHOGONAL FREQUENCY-DIVISION MULTIPLEXING (OFDM) TRANSMISSION OVER A WIDE BANDWIDTH ([[Intel Corporation (18488792). APPARATUS, SYSTEM AND METHOD OF AN ORTHOGONAL FREQUENCY-DIVISION MULTIPLEXING (OFDM) TRANSMISSION OVER A WIDE BANDWIDTH simplified abstract|18488792]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Alexander W. Min
 +
 
 +
 
 +
===GENERIC SYNTHESIZABLE CIRCUIT COUNTERMEASURE AGAINST HARDWARE SCA ([[Intel Corporation (17964549). GENERIC SYNTHESIZABLE CIRCUIT COUNTERMEASURE AGAINST HARDWARE SCA simplified abstract|17964549]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Jason M. Fung
 +
 
 +
 
 +
===QUALITY STATUS LOOPBACK FOR ONLINE COLLABORATION SESSIONS ([[Intel Corporation (18397668). QUALITY STATUS LOOPBACK FOR ONLINE COLLABORATION SESSIONS simplified abstract|18397668]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Aiswarya M. Pious
 +
 
 +
 
 +
===MULTIRADIO INTERFACE DATA MODEL AND RADIO APPLICATION PACKAGE CONTAINER FORMAT FOR RECONFIGURABLE RADIO SYSTEMS ([[Intel Corporation (18547067). MULTIRADIO INTERFACE DATA MODEL AND RADIO APPLICATION PACKAGE CONTAINER FORMAT FOR RECONFIGURABLE RADIO SYSTEMS simplified abstract|18547067]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Markus Dominik MUECK
 +
 
 +
 
 +
===METHODS AND APPARATUS FOR TELEMETRY GRANULARITY MANAGEMENT ([[Intel Corporation (18397791). METHODS AND APPARATUS FOR TELEMETRY GRANULARITY MANAGEMENT simplified abstract|18397791]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Mario Jose Divan Koller
 +
 
 +
 
 +
===MANAGEMENT OF PACKET TRANSMISSION AND RESPONSES ([[Intel Corporation (18391521). MANAGEMENT OF PACKET TRANSMISSION AND RESPONSES simplified abstract|18391521]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Hossein FARROKHBAKHT
 +
 
 +
 
 +
===MANAGEMENT OF PACKET TRANSMISSION AND RESPONSES ([[Intel Corporation (18391565). MANAGEMENT OF PACKET TRANSMISSION AND RESPONSES simplified abstract|18391565]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Hossein FARROKHBAKHT
 +
 
 +
 
 +
===MANAGEMENT OF PACKET TRANSMISSION AND RESPONSES ([[Intel Corporation (18391540). MANAGEMENT OF PACKET TRANSMISSION AND RESPONSES simplified abstract|18391540]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Hossein FARROKHBAKHT
 +
 
 +
 
 +
===DIFFERENTIATED CONTAINERIZATION AND EXECUTION OF WEB CONTENT BASED ON TRUST LEVEL AND OTHER ATTRIBUTES ([[Intel Corporation (18478692). DIFFERENTIATED CONTAINERIZATION AND EXECUTION OF WEB CONTENT BASED ON TRUST LEVEL AND OTHER ATTRIBUTES simplified abstract|18478692]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Hong C. Li
 +
 
 +
 
 +
===SYSTEMS, APPARATUS, AND METHODS TO IMPROVE WEBSERVERS USING DYNAMIC LOAD BALANCERS ([[Intel Corporation (18393236). SYSTEMS, APPARATUS, AND METHODS TO IMPROVE WEBSERVERS USING DYNAMIC LOAD BALANCERS simplified abstract|18393236]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Amruta Misra
 +
 
 +
 
 +
===METHOD AND SYSTEM OF VIDEO CODING WITH HANDLING OF ILLEGAL BLOCK PARTITIONS ([[Intel Corporation (18399169). METHOD AND SYSTEM OF VIDEO CODING WITH HANDLING OF ILLEGAL BLOCK PARTITIONS simplified abstract|18399169]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Tsung-Han Yang
 +
 
 +
 
 +
===Lossless Compression for Multisample Render Targets Alongside Fragment Compression ([[Intel Corporation (18492520). Lossless Compression for Multisample Render Targets Alongside Fragment Compression simplified abstract|18492520]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Prasoonkumar Surti
 +
 
 +
 
 +
===SECURE LINK RECOMMENDATION WITH ENHANCED INTEGRITY IN MULTIPLE BASIC SERVICE SET IDENTIFICATION NETWORKS ([[Intel Corporation (18398442). SECURE LINK RECOMMENDATION WITH ENHANCED INTEGRITY IN MULTIPLE BASIC SERVICE SET IDENTIFICATION NETWORKS simplified abstract|18398442]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Laurent Cariou
 +
 
 +
 
 +
===APPARATUS, SYSTEM, AND METHOD OF QUALITY OF SERVICE (QOS) NETWORK SLICING OVER WIRELESS LOCAL AREA NETWORK (WLAN) ([[Intel Corporation (18399260). APPARATUS, SYSTEM, AND METHOD OF QUALITY OF SERVICE (QOS) NETWORK SLICING OVER WIRELESS LOCAL AREA NETWORK (WLAN) simplified abstract|18399260]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Roya Doostnejad
 +
 
 +
 
 +
===DYNAMIC SELECTION OF TOLLING PROTECTION MECHANISMS AND MULTI-CHANNEL MANAGEMENT ([[Intel Corporation (18547218). DYNAMIC SELECTION OF TOLLING PROTECTION MECHANISMS AND MULTI-CHANNEL MANAGEMENT simplified abstract|18547218]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Markus Dominik Mueck
 +
 
 +
 
 +
===TECHNIQUES FOR CANCELATION OF ONE OR MORE UPLINK TRANSMISSIONS  FROM A USER EQUIPMENT ([[Intel Corporation (18465005). TECHNIQUES FOR CANCELATION OF ONE OR MORE UPLINK TRANSMISSIONS  FROM A USER EQUIPMENT simplified abstract|18465005]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Toufiqul Islam
 +
 
 +
 
 +
===PHYSICAL UPLINK SHARED CHANNEL BASED SMALL DATA TRANSMISSION ([[Intel Corporation (18397817). PHYSICAL UPLINK SHARED CHANNEL BASED SMALL DATA TRANSMISSION simplified abstract|18397817]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Gang Xiong
 +
 
 +
 
 +
===APPARATUS, SYSTEM AND METHOD OF CONFIGURING AN UPLINK TRANSMISSION IN A TRIGGER-BASED MULTI-USER UPLINK TRANSMISSION ([[Intel Corporation (18399480). APPARATUS, SYSTEM AND METHOD OF CONFIGURING AN UPLINK TRANSMISSION IN A TRIGGER-BASED MULTI-USER UPLINK TRANSMISSION simplified abstract|18399480]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Alexander W. Min
 +
 
 +
 
 +
===EXPOSED NODE ISSUE CONFIGURATIONS IN WIRELESS SYSTEMS ([[Intel Corporation (18398756). EXPOSED NODE ISSUE CONFIGURATIONS IN WIRELESS SYSTEMS simplified abstract|18398756]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Laurent Cariou
 +
 
 +
 
 +
===SINGLE-RADIO MULTI-CHANNEL MEDIUM ACCESS ([[Intel Corporation (18346673). SINGLE-RADIO MULTI-CHANNEL MEDIUM ACCESS simplified abstract|18346673]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Minyoung PARK
 +
 
 +
 
 +
===TECHNOLOGIES FOR WIRELESS SENSOR NETWORKS ([[Intel Corporation (18264214). TECHNOLOGIES FOR WIRELESS SENSOR NETWORKS simplified abstract|18264214]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Rahul Khanna
 +
 
 +
 
 +
===TECHNOLOGIES FOR A FLEXIBLE 3D POWER PLANE IN A CHASSIS ([[Intel Corporation (18399565). TECHNOLOGIES FOR A FLEXIBLE 3D POWER PLANE IN A CHASSIS simplified abstract|18399565]])===
 +
 
 +
 
 +
'''Main Inventor'''
 +
 
 +
Nan Wang

Revision as of 09:12, 26 April 2024

Contents

Patent applications for Intel Corporation on April 18th, 2024

MAGNET-DRIVEN CHEMICAL-MECHANICAL POLISHING (17966021)

Main Inventor

Yosef KORNBLUTH


ROBOT MOVEMENT APPARATUS AND RELATED METHODS (18492458)

Main Inventor

Zhongxuan Liu


POWER BUDGETING FOR COMPUTER PERIPHERALS (18399224)

Main Inventor

Kunal Shah


HYPERSCALE POWER CONTROL FOR IMPROVED DATACENTER UTILIZATION (17965698)

Main Inventor

Sheshaprasad KRISHNAPURA


POWER OPTIMIZED BLEND (18390404)

Main Inventor

Theo Drane


FLOATING-POINT DECOMPOSITION CIRCUITRY WITH DYNAMIC PRECISION (18399381)

Main Inventor

Roberto DiCecco


PROGRAM ANALYSIS, DESIGN SPACE EXPLORATION AND VERIFICATION FOR HIGH-LEVEL SYNTHESIS VIA E-GRAPH REWRITING (18396321)

Main Inventor

Jianyi Cheng


METHODS AND APPARATUS TO COMPILE PORTABLE CODE FOR SPECIFIC HARDWARE (18399033)

Main Inventor

Fabian Oboril


INSTRUCTIONS FOR FUSED MULTIPLY-ADD OPERATIONS WITH VARIABLE PRECISION INPUT OPERANDS (18399578)

Main Inventor

Dipankar DAS


SYSTEMS AND METHODS FOR PERFORMING 16-BIT FLOATING-POINT MATRIX DOT PRODUCT INSTRUCTIONS (18397664)

Main Inventor

Alexander F. HEINECKE


SYSTEMS AND METHODS FOR EXECUTING A FUSED MULTIPLY-ADD INSTRUCTION FOR COMPLEX NUMBERS (18399473)

Main Inventor

Roman S. Dubtsov


SYSTEMS FOR PERFORMING INSTRUCTIONS TO QUICKLY CONVERT AND USE TILES AS 1D VECTORS (18399014)

Main Inventor

Bret TOLL


CONFIGURING AND DYNAMICALLY RECONFIGURING CHAINS OF ACCELERATORS (17967756)

Main Inventor

Saurabh GAYEN


Apparatus, Device, Method, Computer Program and Computer System for Determining Presence of a Noisy Neighbor Virtual Machine (18394677)

Main Inventor

Mona MINAKSHI


METHODS AND APPARATUS TO MANAGE WORKLOADS FOR AN OPERATING SYSTEM (18396350)

Main Inventor

Leslie Xu


CHAINED ACCELERATOR OPERATIONS (17967740)

Main Inventor

Saurabh GAYEN


PREDICTIVE WORKLOAD ORCHESTRATION FOR DISTRIBUTED COMPUTING ENVIRONMENTS (18538364)

Main Inventor

Sundar Nadathur


Method and system for dynamically detecting memory sub-channel mapping and data lane mapping between a memory controller and physical layer circuitry (18539350)

Main Inventor

Zhiguo WEI


CRYPTOGRAPHIC SEPARATION OF MMIO ON DEVICE (18462605)

Main Inventor

Luis S. Kida


METHOD AND APPARATUS TO USE DRAM AS A CACHE FOR SLOW BYTE-ADDRESSIBLE MEMORY FOR EFFICIENT CLOUD APPLICATIONS (18392310)

Main Inventor

Yao Zu DONG


HARDWARE PROCESSOR CORE HAVING A MEMORY SLICED BY LINEAR ADDRESS (17949803)

Main Inventor

Mark Dechene


AUTOMATED DETECTION OF CASE-SPLITTING OPPORTUNITIES IN RTL (18395066)

Main Inventor

Samuel Coward


SEMI-AUTOMATIC TOOL TO CREATE FORMAL VERIFICATION MODELS (18394854)

Main Inventor

Disha Puri


GRAPH NEURAL NETWORK MODEL FOR NEURAL NETWORK SCHEDULING DECISIONS (18394307)

Main Inventor

Hamza Yous


VIDEO SUMMARIZATION USING SEMANTIC INFORMATION (18510354)

Main Inventor

Myung Hwangbo


SYSTEMS AND METHODS FOR AN ACCELERATED AND ENHANCED TUNING OF A MODEL BASED ON PRIOR MODEL TUNING DATA (18397909)

Main Inventor

Michael McCourt


METHODS AND DEVICES FOR ITEM TRACKING IN CLOSED ENVIRONMENTS (18398207)

Main Inventor

Rita H. WOUHAYBI


IMAGE PROCESSING TECHNOLOGIES (17967666)

Main Inventor

Narifumi IWAMOTO


CHAINED ACCELERATOR OPERATIONS WITH STORAGE FOR INTERMEDIATE RESULTS (17967768)

Main Inventor

Christopher J. HUGHES


METHODS AND APPARATUS TO IMPLEMENT SUPER-RESOLUTION UPSCALING FOR DISPLAY DEVICES (18397751)

Main Inventor

Petrus Van Beek


ADAPTIVE DEFORMABLE KERNEL PREDICTION NETWORK FOR IMAGE DE-NOISING (18514252)

Main Inventor

Anbang Yao


SYSTEMS AND METHODS FOR TONE MAPPING OF HIGH DYNAMIC RANGE IMAGES FOR HIGH-QUALITY DEEP LEARNING BASED PROCESSING (18491533)

Main Inventor

Attila Tamas Afra


TECHNOLOGIES FOR FUSING DATA FROM MULTIPLE SENSORS TO IMPROVE OBJECT DETECTION, IDENTIFICATION, AND LOCALIZATION (18528424)

Main Inventor

Soila Kavulya


SYSTEMS AND METHODS FOR PROVIDING NON-LEXICAL CUES IN SYNTHESIZED SPEECH (18491266)

Main Inventor

Jessica M. Christian


DECOUPLING CAPACITORS BASED ON DUMMY THROUGH-SILICON-VIAS (18396922)

Main Inventor

Changyok Park


EMBEDDED DIE ARCHITECTURE AND METHOD OF MAKING (18392368)

Main Inventor

Robert L. Sankman


MICROELECTRONICS PACKAGE COMPRISING A PACKAGE-ON-PACKAGE (POP) ARCHITECTURE WITH INKJET BARRIER MATERIAL FOR CONTROLLING BONDLINE THICKNESS AND POP ADHESIVE KEEP OUT ZONE (18399205)

Main Inventor

Elizabeth NOFEN


NESTED ARCHITECTURES FOR ENHANCED HETEROGENEOUS INTEGRATION (18397906)

Main Inventor

Ravindranath MAHAJAN


PACKAGE SUBSTRATE WITH DUAL DAMASCENE BASED SELF-ALIGNED VIAS (18047033)

Main Inventor

Jeremy Ecton


METHOD TO IMPLEMENT WAFER-LEVEL CHIP-SCALE PACKAGES WITH GROUNDED CONFORMAL SHIELD (18397898)

Main Inventor

Gianni SIGNORINI


HETEROGENEOUS NESTED INTERPOSER PACKAGE FOR IC CHIPS (18397915)

Main Inventor

Debendra MALLIK


ASSEMBLY OF 2XD MODULE USING HIGH DENSITY INTERCONNECT BRIDGES (18399220)

Main Inventor

Bernd WAIDHAS


PACKAGE ARCHITECTURE WITH GLASS CORE SUBSTRATE HAVING INTEGRATED INDUCTORS (18046635)

Main Inventor

Brandon C. Marin


LASER ABLATION-BASED SURFACE PROPERTY MODIFICATION AND CONTAMINATION REMOVAL (18399178)

Main Inventor

Denis MYASISHCHEV


MICROELECTRONIC ASSEMBLIES (18397873)

Main Inventor

Adel A. Elsherbini


MULTI-CHIP PACKAGING (18397891)

Main Inventor

Robert L. SANKMAN


VOLTAGE REGULATOR CIRCUIT INCLUDING ONE OR MORE THIN-FILM TRANSISTORS (18396360)

Main Inventor

Abhishek A. SHARMA


INTEGRATED CIRCUIT CONTACT STRUCTURES (18396174)

Main Inventor

Patrick Morrow


HARDWARE ACCELERATION OF DATA REDUCTION OPERATIONS (18397651)

Main Inventor

Smita Kumar


APPARATUS, SYSTEM AND METHOD OF AN ORTHOGONAL FREQUENCY-DIVISION MULTIPLEXING (OFDM) TRANSMISSION OVER A WIDE BANDWIDTH (18488792)

Main Inventor

Alexander W. Min


GENERIC SYNTHESIZABLE CIRCUIT COUNTERMEASURE AGAINST HARDWARE SCA (17964549)

Main Inventor

Jason M. Fung


QUALITY STATUS LOOPBACK FOR ONLINE COLLABORATION SESSIONS (18397668)

Main Inventor

Aiswarya M. Pious


MULTIRADIO INTERFACE DATA MODEL AND RADIO APPLICATION PACKAGE CONTAINER FORMAT FOR RECONFIGURABLE RADIO SYSTEMS (18547067)

Main Inventor

Markus Dominik MUECK


METHODS AND APPARATUS FOR TELEMETRY GRANULARITY MANAGEMENT (18397791)

Main Inventor

Mario Jose Divan Koller


MANAGEMENT OF PACKET TRANSMISSION AND RESPONSES (18391521)

Main Inventor

Hossein FARROKHBAKHT


MANAGEMENT OF PACKET TRANSMISSION AND RESPONSES (18391565)

Main Inventor

Hossein FARROKHBAKHT


MANAGEMENT OF PACKET TRANSMISSION AND RESPONSES (18391540)

Main Inventor

Hossein FARROKHBAKHT


DIFFERENTIATED CONTAINERIZATION AND EXECUTION OF WEB CONTENT BASED ON TRUST LEVEL AND OTHER ATTRIBUTES (18478692)

Main Inventor

Hong C. Li


SYSTEMS, APPARATUS, AND METHODS TO IMPROVE WEBSERVERS USING DYNAMIC LOAD BALANCERS (18393236)

Main Inventor

Amruta Misra


METHOD AND SYSTEM OF VIDEO CODING WITH HANDLING OF ILLEGAL BLOCK PARTITIONS (18399169)

Main Inventor

Tsung-Han Yang


Lossless Compression for Multisample Render Targets Alongside Fragment Compression (18492520)

Main Inventor

Prasoonkumar Surti


SECURE LINK RECOMMENDATION WITH ENHANCED INTEGRITY IN MULTIPLE BASIC SERVICE SET IDENTIFICATION NETWORKS (18398442)

Main Inventor

Laurent Cariou


APPARATUS, SYSTEM, AND METHOD OF QUALITY OF SERVICE (QOS) NETWORK SLICING OVER WIRELESS LOCAL AREA NETWORK (WLAN) (18399260)

Main Inventor

Roya Doostnejad


DYNAMIC SELECTION OF TOLLING PROTECTION MECHANISMS AND MULTI-CHANNEL MANAGEMENT (18547218)

Main Inventor

Markus Dominik Mueck


TECHNIQUES FOR CANCELATION OF ONE OR MORE UPLINK TRANSMISSIONS FROM A USER EQUIPMENT (18465005)

Main Inventor

Toufiqul Islam


PHYSICAL UPLINK SHARED CHANNEL BASED SMALL DATA TRANSMISSION (18397817)

Main Inventor

Gang Xiong


APPARATUS, SYSTEM AND METHOD OF CONFIGURING AN UPLINK TRANSMISSION IN A TRIGGER-BASED MULTI-USER UPLINK TRANSMISSION (18399480)

Main Inventor

Alexander W. Min


EXPOSED NODE ISSUE CONFIGURATIONS IN WIRELESS SYSTEMS (18398756)

Main Inventor

Laurent Cariou


SINGLE-RADIO MULTI-CHANNEL MEDIUM ACCESS (18346673)

Main Inventor

Minyoung PARK


TECHNOLOGIES FOR WIRELESS SENSOR NETWORKS (18264214)

Main Inventor

Rahul Khanna


TECHNOLOGIES FOR A FLEXIBLE 3D POWER PLANE IN A CHASSIS (18399565)

Main Inventor

Nan Wang

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