INTERNATIONAL BUSINESS MACHINES CORPORATION patent applications on April 25th, 2024
Patent Applications by INTERNATIONAL BUSINESS MACHINES CORPORATION on April 25th, 2024
INTERNATIONAL BUSINESS MACHINES CORPORATION: 60 patent applications
INTERNATIONAL BUSINESS MACHINES CORPORATION has applied for patents in the areas of G06N20/00 (16), H01L23/528 (6), H01L21/768 (5), H01L29/775 (4), G06N3/08 (4)
With keywords such as: data, based, computer, machine, device, include, image, rail, learning, and input in patent application abstracts.
Patent Applications by INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor(s): PAUL SAMANIEGO of PORT EWEN NY (US) for international business machines corporation, DOUGLAS ALEXANDER SMALLEY of CLINTON CORNERS NY (US) for international business machines corporation, KARL OWEN CASSERLY of VALLEY STREAM NY (US) for international business machines corporation, ERIC MALLERY of EAST HARTFORD CT (US) for international business machines corporation, MATEUSZ KOZIOL of POUGHKEEPSIE NY (US) for international business machines corporation, ALFREDO FAPPIANO of TORRINGTON CT (US) for international business machines corporation, JAMES HOEY of NEW YORK NY (US) for international business machines corporation, OSWALD J. MANTILLA of DUTCHESS NY (US) for international business machines corporation, RYAN ELSASSER of POUGHKEEPSIE NY (US) for international business machines corporation
IPC Code(s): B23D75/00
Abstract: a reaming tool vacuum assembly comprising: a reaming tool comprising a reaming bit, the reaming bit comprising: a tip end; a base end; a plurality of flutes tapered toward the tip end; a plurality of apertures positioned between the plurality of flutes, wherein the plurality of apertures define a plurality of openings to an interior chamber of the reaming bit; a first rigid tube positioned in the interior chamber of the reaming bit, wherein the reaming bit is rotatable around a longitudinal axis of the first rigid tube and independent of the first rigid tube; and a vacuum to provide suction in the interior chamber of the reaming bit via the first rigid tube.
Inventor(s): Tushar Agrawal of West Fargo ND (US) for international business machines corporation, Atul Mene of Morrisville NC (US) for international business machines corporation, Jeremy R. Fox of Georgetown TX (US) for international business machines corporation, Sarbajit K. Rakshit of Kolkata (IN) for international business machines corporation
IPC Code(s): B29C64/393, B33Y50/02, B64C39/02, B64D47/00
Abstract: computer-implemented methods for dynamic sensor printing and deployment. aspects include receiving, from one or more symptom tracking sensors disposed on an apparatus, data regarding a condition of the apparatus and analyzing the data regarding the condition of the apparatus. aspects also include determining, based on the analysis, one or more required additional measurements of the apparatus and creating, by a three-dimensional printer, one or more sensors configured to measure the one or more required additional measurements. aspects further include placing the one or more sensors on the apparatus.
Inventor(s): David Abraham of Croton NY (US) for international business machines corporation, Gerard McVicker of Stormville NY (US) for international business machines corporation, Sri M. Sri-Jayantha of Ossining NY (US) for international business machines corporation, Vijayeshwar Das Khanna of Milwood NY (US) for international business machines corporation, Nicholas A. Masluk of Putnam NY (US) for international business machines corporation
IPC Code(s): F25D3/10, H01P3/00
Abstract: a cryogenic system comprising a first cryogenic stage and a second cryogenic stage. a first signal line passing from the first cryogenic stage and is connected to a superconducting thermal break in the second cryogenic stage. a second signal line connecting the superconducting thermal break to a cryogenic device.
Inventor(s): Shailendra Moyal of Pune (IN) for international business machines corporation, Sarbajit K. Rakshit of Kolkata (IN) for international business machines corporation, Partho Ghosh of Kolkata (IN) for international business machines corporation
IPC Code(s): G05B19/4061, G05B19/418
Abstract: identifying critical zones of machines is provided. a digital twin simulation of a machine is performed. an analysis of a set of historical incident records corresponding to the machine is performed to determine areas surrounding the machine that will be impacted by propagation of different types of incidents corresponding to the machine. a task performed by the machine, an operating context of the machine, an aggregate energy of the machine, and an area in the industrial machine environment affected by propagation of released energy from the machine are identified based on the digital twin simulation and the analysis of the set of historical incident records. a set of critical zones corresponding to the machine is identified based on the task performed by the machine, the operating context of the machine, the aggregate energy of the machine, and the area in the industrial machine environment affected by propagation of released energy.
Inventor(s): Jenny S. Li of Franklinton NC (US) for international business machines corporation, Satish Rajani of Dewas (IN) for international business machines corporation, Raghu Ramaswamy of Bengaluru (IN) for international business machines corporation, Gopalan Shankar of Boca Raton FL (US) for international business machines corporation
IPC Code(s): G05D1/00, G05D1/02
Abstract: adjusting a navigation path of a worker land roaming edge device is provided. the worker land roaming edge device is identified moving along a navigation path to an asset to perform a task. it is determined that the worker land roaming edge device cannot reach the asset to perform the task due to an environment change along the navigation path. a set of task performance alternatives is generated in response to determining that the worker land roaming edge device cannot reach the asset to perform the task. a task performance alternative of the set of task performance alternatives is selected based on a set of criteria. the navigation path of the worker land roaming edge device is adjusted in accordance with the selected task performance alternative. the adjusted navigation path is sent to the worker land roaming edge device to dynamically adjust operation of the worker land roaming edge device.
Inventor(s): Hui Zhang of Shanghai (CN) for international business machines corporation, Gang Lyu of Shanghai (CN) for international business machines corporation
IPC Code(s): G06F3/06
Abstract: in one general embodiment, a computer-implemented method includes detecting overdrive of a raid array. an extent residing, at least in part, in both the overdriven raid array and in a cache is selected. data missing from the extent is staged, from the overdriven raid array, to complete the extent in the cache. the original extent space in the overdriven raid array is freed. the extent data in the cache is destaged to a target raid array. space in the cache corresponding to the extent is freed in response to completing the destaging.
Inventor(s): Ernest Stewart Gale of Tucson AZ (US) for international business machines corporation, Roy Cideciyan of Rueschlikon (CH) for international business machines corporation, Simeon Furrer of Altdorf (CH) for international business machines corporation, Masayuki Iwanaga of Urayasu (JP) for international business machines corporation, Keisuke Tanaka of Tokyo (JP) for international business machines corporation
IPC Code(s): G06F3/06
Abstract: the present disclosure includes systems and methods for reducing rewrite overhead in a sequential access storage system. the method may comprise writing a data set to a sequential access medium using a magnetic head, wherein the data set comprises a plurality of encoded data blocks, classifying each of the plurality of encoded data blocks on the sequential access medium into one of at least three classes of write quality, and rewriting the encoded data blocks in a rewrite area of the sequential access medium based at least in part on the write quality class. in some embodiments, the at least three classes of write quality may comprise a hard rewrite class for which rewrites are necessary to prevent data loss, a soft rewrite class for which rewrites are desirable but not necessary, and a no rewrite class for which no rewrite is needed or desired.
Inventor(s): Ankur AGRAWAL of Chappaqua NY (US) for international business machines corporation, Kailash GOPALAKRISHNAN of New York NY (US) for international business machines corporation, Hung Hoang TRAN of Chicago IL (US) for international business machines corporation, Vijayalakshmi SRINIVASAN of New York NY (US) for international business machines corporation
IPC Code(s): G06F7/483, G06F7/544
Abstract: provided are a floating-point unit, a system, and method for generating binary integer output or floating-point output based on a selector. a first input operand, a second input operand, a third input operand, and a result format selector value are received. the first input operand, the second input operand, and the third input operand comprise floating-point values. the first input operand, the second input operand, and the third input operand are processed to produce a final result comprising one of a binary integer value and a floating point value based on the result format selector value.
Inventor(s): Steven I. Ross of S. Hamilton MA (US) for international business machines corporation, Stephanie Houde of Belmont MA (US) for international business machines corporation, Fernando Carlos Martinez of La Plata, (AR) for international business machines corporation
IPC Code(s): G06F8/33
Abstract: embodiments relate to interactive editing of a machine-generated document. a computer-implemented method includes receiving, by a processor, a machine-generated document and performing a comparison of a current state of the machine-generated document to a previous state. a user edit is identified as one or more user-replaced tokens of a previous token sequence based at least in part on the comparison. a new version of the machine-generated document is generated that includes the one or more user-replaced tokens and identifies one or more related tokens to replace with a suggested replacement token sequence associated with the one or more user-replaced tokens. a suggestion list is generated for display to the user in a graphical user interface to indicate the suggested replacement token sequence to replace the one or more related tokens.
Inventor(s): Michael M. Morin of South Burlington VT (US) for international business machines corporation, Thomas Furland of Essex Junction VT (US) for international business machines corporation, Jonathan Fry of Fishkill NY (US) for international business machines corporation
IPC Code(s): G06F9/448, G06F11/14
Abstract: a computer-implemented method, system and computer program product for modeling a manufacturing process. snapshots of the system are received, where each snapshot includes a time that the snapshot was taken and a state of the system at that time. possible transitions paths in a state diagram exhibited by the system are then identified based on the snapshots. a transition path out of the identified transition paths that most likely corresponds to the sequence of state changes exhibited by the system is selected based on information pertaining to a typical time taken by the system from one state to another. a predicted time that the system entered each state of the selected transition path between selected states of the snapshots is determined based on such information as well as the time at which the snapshots were taken. an issue related to the manufacturing process is predicted based on such predicted times.
Inventor(s): Jovan Stojkovic of Champaign IL (US) for international business machines corporation, Hubertus Franke of Cortlandt Manor NY (US) for international business machines corporation, Tianyin Xu of Urbana IL (US) for international business machines corporation, Josep Torrellas of Champaign IL (US) for international business machines corporation
IPC Code(s): G06F9/50, G06F9/52
Abstract: a computer implemented method manages function execution in a container. a dispatcher in the container running in a computer system executes a function initialization in response to a first request for a function. the dispatcher in the container running in the computer system creates group of handlers in response to receiving a group of requests for the function. the dispatcher in the container running in the computer system sends the group of requests to the group of handlers in response to receiving the group of requests. the dispatcher in the container running in the computer system executes the group of requests using the group of handlers.
Inventor(s): Shailendra Moyal of PUNE (IN) for international business machines corporation, Sarbajit K. Rakshit of KOLKATA (IN) for international business machines corporation, Akash U. Dhoot of PUNE (IN) for international business machines corporation, Shilpa Bhagwatprasad Mittal of PUNE (IN) for international business machines corporation
IPC Code(s): G06F9/50
Abstract: a computer implemented method manages nonintelligent items. a computer system identifies a workflow to be performed. the computer system identifies a group of the nonintelligent items involved in actions for the workflow. the computer system attaches a set of computing devices to the group of the nonintelligent items to convert the group of the nonintelligent items into a group of converted nonintelligent items. the computer system performs the actions in the workflow using the group of converted nonintelligent items.
Inventor(s): Mathews Thomas of Flower Mound TX (US) for international business machines corporation, Utpal Mangla of Toronto (CA) for international business machines corporation, Sai Srinivas Gorti of Irving TX (US) for international business machines corporation, Sharath Prasad Krishna Prasad of Flower Mound TX (US) for international business machines corporation, Venkatesh Ashok Rao Rao of Natick MA (US) for international business machines corporation, Praveen Jayachandran of Bangalore (IN) for international business machines corporation, Eric Lee Gose of Dallas TX (US) for international business machines corporation, Juel Daniel Raju of Garland TX (US) for international business machines corporation, Amandeep Singh of Carrollton TX (US) for international business machines corporation
IPC Code(s): G06F9/50
Abstract: an approach for managing workload deployment in a distributed network, including edge computing is provided. the approach includes deploying several modules, such as, emm (energy management module), ldm (localized deployment manager) and edm (edge deployment manager). these modules will be constantly monitoring and managing the energy consumption at the edge nodes under their purview and communicate with other modules to develop a holistic energy management system (e.g., energy policies, energy algorithms, energy plans, etc.) to ensure the most effective energy management of workload is implemented.
Inventor(s): Naijie Li of Beijing (CN) for international business machines corporation, Dong Hui Liu of Beijing (CN) for international business machines corporation, Jing Lu of Beijing (CN) for international business machines corporation, Peng Hui Jiang of Beijing (CN) for international business machines corporation, Xiao Yan Tang of Beijing (CN) for international business machines corporation, Bao Zhang of Beijing (CN) for international business machines corporation, Yong Yin of Beijing (CN) for international business machines corporation, Jun Su of Beijing (CN) for international business machines corporation, Jia Yu of Beijing (CN) for international business machines corporation
IPC Code(s): G06F12/1027, G06N20/00
Abstract: a method, including: identifying static application features of an application; identifying resource access features of the application; labeling a translation lookaside buffer (tlb) miss threshold of a runtime feature of the application; determining utilization of larger pages during the runtime based on the tlb miss threshold; and setting the tlb miss threshold based on the determined utilization of the larger pages.
Inventor(s): Jia Tian Zhong of BEIJING (CN) for international business machines corporation, Peng Hui Jiang of BEIJING (CN) for international business machines corporation, Ming Lei Zhang of BEIJING (CN) for international business machines corporation, Ting Ting Zhan of BEIJING (CN) for international business machines corporation, Le Chang of BEIJING (CN) for international business machines corporation, Zhen Liu of BEIJING (CN) for international business machines corporation, Xiao Yan Tian of BEIJING (CN) for international business machines corporation
IPC Code(s): G06F16/2453, G06F11/34, G06F21/62
Abstract: an example operation may include one or more of storing an index that comprises identifiers of role-based access privileges for a plurality of users with respect to a database, receiving a database query associated with a user from a software program, identifying data records within the database that the user has permission to access based on database accessibility rights of the user stored within the index, prior to execution of the database query, loading the identified data records into the memory and filtering out other data records from the database which the user does not have permission to access, and executing the database query on the identified data records loaded from the database and returning query results from the execution to the software program.
Inventor(s): Xiao Xiao Chen of Beijing (CN) for international business machines corporation, Sheng Yan Sun of Beijing (CN) for international business machines corporation, Peng Hui Jiang of Beijing (CN) for international business machines corporation, YING ZHANG of Beijing (CN) for international business machines corporation
IPC Code(s): G06F16/2453, G06F11/34, G06F16/28
Abstract: a computer-implemented method dynamically switches access plans for a query during concurrent query execution. the method includes receiving a first query configured to be processed by a database system. the method also includes generating, for the first query, an access plan for each of identified resource sets. the method includes determining a first set of available resources that represent an available capacity for the database system. the method further includes selecting a first resource set of the one or more resource sets, where the selecting is based on the first set of available resources being closest to the first resource set. the method also includes selecting, based on the first set of available resources, a first access plan of the one or more access plans. the method includes executing the first query and returning results of the first query to a source of the first query.
Inventor(s): Sima NADLER of Kochav Yaïr (IL) for international business machines corporation, Ronen Itshak KAT of Kochav Yaïr (IL) for international business machines corporation, Michael FACTOR of Haifa (IL) for international business machines corporation, Shlomit KOYFMAN of Kiryat Yam (IL) for international business machines corporation, Roee SHLOMO of Petah Tikva (IL) for international business machines corporation
IPC Code(s): H04L41/084, G06F21/62
Abstract: an example system includes a processor to generate a data plane based on dataset metadata, data plane component metadata, data governance decisions, and information technology (it) system metrics. the processor is to also apply components of the data plane for a specified workload across a number of computing devices selected by a control plane.
Inventor(s): Girmaw Abebe Tadesse of Nairobi (KE) for international business machines corporation, William Ogallo of Nairobi (KE) for international business machines corporation, George Sirbu of Saline MI (US) for international business machines corporation, Aisha Walcott of Nairobi (KE) for international business machines corporation, Skyler Speakman of Nairobi (KE) for international business machines corporation
IPC Code(s): G06F21/62
Abstract: one or more computer processors discover an anomalous subset through sparsity-based automatic feature selection.
Inventor(s): Christopher Kent Karstens of Miami Beach FL (US) for international business machines corporation
IPC Code(s): G06F21/64, G06F16/27
Abstract: a processor may identify that a new data entry is being generated. the processor may identify that the new data entry is associated with a replica data entry threshold. the replica data entry threshold may indicate a minimum amount of replica data entries to generate. the replica data entries may be substantially similar to the new data entry. the processor may generate an amount of replica data entries. the processor may store the new data entry and the amount of replica data entries in a repository.
Inventor(s): Gregor Boronowsky of Böblingen (DE) for international business machines corporation, Marvin von der Ehe of Vellmar (DE) for international business machines corporation, Manuel Beck of Dettingen unter Teck (DE) for international business machines corporation, Jan Niklas Stegmaier of Sindelfingen (DE) for international business machines corporation, Simon Hermann Friedmann of Böblingen (DE) for international business machines corporation
IPC Code(s): G06F30/398, G06N3/04, G06N3/092
Abstract: disclosed herein is a computer implemented method of correcting a timing failure of a network of conductors and repowering structures in an integrated circuit design using a reinforcement learning agent. the reinforcement learning agent comprises a neural network. the method comprises: receiving a graph comprising nodes and edges that encodes said network of conductors and repowering structures; and receiving a modification recommendation from said reinforcement learning agent in response to inputting said graph into said reinforcement learning agent.
Inventor(s): Masayasu Muraoka of Tokyo (JP) for international business machines corporation, Dolca Tellols Asensi of Castelló (ES) for international business machines corporation, Issei Yoshida of Tokyo (JP) for international business machines corporation
IPC Code(s): G06F40/253, G06F40/117, G06F40/279
Abstract: computer technology for determining and tagging parts of speech in a text (that is pos ragging), where the context used by the natural language processing machine logic (for example, nlp software) includes both: (i) other words in the sentence under analysis where a given word to be tagged appears; and (ii) words in the other sentences besides the sentence under analysis. other context sentences may be selected randomly, by next sentence prediction technology and/or by choosing sentences in textual proximity to the sentence under analysis.
20240135102.WIREFRAME GENERATION_simplified_abstract_(international business machines corporation)
Inventor(s): Zhaoqi Wu of Shanghai (CN) for international business machines corporation, Yi Fang Chen of DaLian (CN) for international business machines corporation, Zhi Wang of Shanghai (CN) for international business machines corporation, Yi Qun Zhang of Shanghai (CN) for international business machines corporation, Yan Du of Beijing (CN) for international business machines corporation, Li Na Yuan of BEIJING (CN) for international business machines corporation
IPC Code(s): G06F40/295, G06F40/216, G06N3/04, G06N3/08
Abstract: a method of this disclosure may include performing a named entity recognition on text information related to requirements for a wireframe by a first artificial intelligence (ai) model, so as to extract entities and relations of the entities from the text information. the method may further comprise inputting the extracted entities and relations to a second ai model to generate the wireframe, wherein the second ai model is trained so that a difference between resultant relations of the entities of the generated wireframe and the extracted relations of the entities from the first ai model is decreased.
20240135158.PROCESSING TENSORS_simplified_abstract_(international business machines corporation)
Inventor(s): Julian Heyne of Stuttgart (DE) for international business machines corporation, Razvan Peter Figuli of Remchingen (DE) for international business machines corporation, Cedric Lichtenau of Stuttgart (DE) for international business machines corporation, Holger Horbach of Aidlingen (DE) for international business machines corporation
IPC Code(s): G06N3/063, G06F12/0882
Abstract: the present disclosure relates to a method of accessing a n-dimensional tensor of elements in a memory by a computer system. the multidimensional tensor comprises two-dimensional arrays, herein referred to as pages, each page being configured to comprise a predefined number of one-dimensional arrays of elements, herein referred to as sticks. the method includes linearly loading page per page of the tensor, and doing the following for each page: loading the non-empty sticks of the page from the memory using a base address of the page and determining a base address for the subsequent page using the number of loaded sticks and using an address offset indicative of potential empty sticks of the page. in case the number of loaded pages reaches a chunk size, the chunk page counter may be reinitialized and the linear loading may be continued with a subsequent page.
Inventor(s): Malte Johannes Rasch of Chappaqua NY (US) for international business machines corporation
IPC Code(s): G06N3/08, G06N3/047
Abstract: a computer implemented method includes performing a gradient update for a stochastic gradient descent (sgd) of a deep neural network (dnn) using a first set of hidden weights stored in a first matrix comprising a resistive processing unit (rpu) crossbar array. a second matrix comprising a second set of hidden weights is stored in a digital medium. a third matrix comprising a set of reference values is computed upon a transfer cycle of the first set of weights from the first matrix to the second matrix, accounting for a sign-change (chopper). the third matrix is stored in the digital medium. a third set of weights is updated for the dnn from the second matrix when a threshold is reached for the second set of weights, in a fourth matrix comprising a rpu crossbar array.
Inventor(s): Shashanka Ubaru of Ossining NY (US) for international business machines corporation, Paz Fink Shustin of Tel-Aviv (IL) for international business machines corporation, Lior Horesh of North Salem NY (US) for international business machines corporation, Vasileios Kalantzis of White Plains NY (US) for international business machines corporation, Haim Avron of Tel Aviv (IL) for international business machines corporation
IPC Code(s): G06N3/088, G06N3/04, G06N3/0455
Abstract: a method to determine data uncertainty is provided. the method receives a high dimensional data input and a corresponding data output. the method trains a variational autoencoder (vae) with the high dimensional data input to learn a low dimensional latent space representation of the high dimensional data input. an encoder part of the vae outputs a set of distributions of the high dimensional dataset in a latent space. the method samples new data samples in the latent space using the set of distributions outputs from the encoder part of the vae. the method learns a polynomial chaos expansion to map the new data samples in the latent space to the corresponding data output to learn the set of distributions and their relation to perform estimation with high-dimensional dataset under uncertainty such as missing values by estimating the values using the set of distributions.
Inventor(s): Sanjeeb Dash of Croton on Hudson NY (US) for international business machines corporation, Joao P. Goncalves of Wappingers Falls NY (US) for international business machines corporation
IPC Code(s): G06N5/02
Abstract: mechanisms are provided for automated rule set generation for identifying relations in knowledge graph data structures. an input knowledge graph is processed to extract tuples representing relations between entities present in the input knowledge graph. a set of rules is generated based on one or more heuristics applied to tuples, and candidate rule(s) are identified that are candidates for adding to the set of rules. a linear programming computer model is evaluated for a modified set of rules comprising the set of rules and the candidate rule(s) to determine whether or not adding the candidate rule(s) improves an objective function of the linear programming model. the set of rules is expanded to include the candidate rule(s) in response to the evaluation of the linear programming computer model indicating that the addition of the candidate rule(s) improves the objective function of the linear programming computer model.
Inventor(s): Felix Julian Schupp of Adliswil (CH) for international business machines corporation, Noelia Vico Trivino of Zurich (CH) for international business machines corporation, Matthias Mergenthaler of Zurich (CH) for international business machines corporation, Andreas Fuhrer Janett of Rueschlikon (CH) for international business machines corporation
IPC Code(s): G06N10/40
Abstract: a qubit device or system having isolated bottom corner gates includes a semiconductor substrate and a semiconductor fin perpendicularly adjoining a top surface of the substrate. the qubit device also includes a first gate located at a first corner between a first side of the fin and the top surface of the substrate, and a second gate located at a second corner between a second, opposite side of the fin and the top surface of the substrate. the first and second gates are electrically isolated from each other and used to control a first quantum dot near the top of the fin. a third gate located at the first corner has a contact for accumulating a channel to facilitate charge transport to and from a second quantum dot located near the bottom of the fin accumulated using the first and second gates.
Inventor(s): Gian Gentinetta of Chavannes-près-Renens (CH) for international business machines corporation, David Sutter of Zuerich (CH) for international business machines corporation, Stefan Woerner of Zurich (CH) for international business machines corporation
IPC Code(s): G06N10/60
Abstract: described are techniques for optimizing a quantum kernel for a support vector machine task. the techniques include receiving, by digital processor, a set of training data, each member of the set representing a data vector (x) and a label (y) identifying the respective member to be part of either a first class or a second class the techniques further include providing, by the digital processor, the quantum kernel comprising a set of unitary operations adapted for acting on a zero state of qubits of a universal quantum circuit the techniques further include performing, by a quantum processor comprising a set of interlinked quantum circuits, an alignment of the quantum kernel using an optimization algorithm based on the set of training data on a primal problem approach of the support vector machine task.
Inventor(s): Natalia Martinez Gil of Durham NC (US) for international business machines corporation, Kanthi Sarpatwar of Elmsford NY (US) for international business machines corporation, Roman Vaculin of Larchmont NY (US) for international business machines corporation
IPC Code(s): G06N20/00
Abstract: a computer-implemented method, system and computer program product for generating in-distribution samples of data for a neighborhood distribution to be used by post-hoc local explanation methods. an autoencoder is trained to generate in-distribution samples of input data for the neighborhood distribution to be used by a post-hoc local explanation method. such training includes mapping the input data (e.g., time series data) into a latent dimension (or latent space) forming a first and a second latent code. a mixed code is then obtained by convexly combining the first and second latent codes with a random coefficient. the mixed code is then decoded with the input data masked with interpretable features to obtain conditional mixed reconstructions. adversarial training is then performed against a discriminator in order to promote in-distribution samples by computing the reconstruction losses of the conditional mixed reconstructions as well as the discriminator losses and then minimizing such losses.
Inventor(s): Avirup Saha of Kolkata (IN) for international business machines corporation, Neelamadhav Gantayat of Bangalore (IN) for international business machines corporation, Renuka Sindhgatta Rajan of Bangalore (IN) for international business machines corporation, SAMPATH DECHU of Acton MA (US) for international business machines corporation, Ravi Shankar Arunachalam of Bangalore (IN) for international business machines corporation, Kushal Mukherjee of New Delhi (IN) for international business machines corporation
IPC Code(s): G06N20/00
Abstract: mechanisms are provided for forecasting information technology (it) and environmental impacts on key performance indicators (kpis). machine learning (ml) computer model(s) are trained on historical data representing it events and kpis of organizational processes (ops). the ml computer model(s) forecast it events given kpis, or kpi impact given it events. correlation graph data structure(s) are generated that map at least one of it events to it computing resources, or kpi impacts to ops. the trained ml computer model(s) process input data to generate a forecast output that specifies at least one of a forecasted it event or a kpi impact. the forecasted output is correlated with at least one of it computing resource(s) or op(s), at least by applying the correlation graph data structure(s) to the forecast output to generate a correlation output. a remedial action recommendation is generated based on the forecast output and correlation output.
Inventor(s): Radu Marinescu of Dublin (IE) for international business machines corporation, Parikshit Ram of Atlanta GA (US) for international business machines corporation, Djallel Bouneffouf of Poughkeepsie NY (US) for international business machines corporation, Tejaswini Pedapati of White Plains NY (US) for international business machines corporation, Paulito Palmes of Dublin (IE) for international business machines corporation
IPC Code(s): G06N20/00, G06F7/544
Abstract: a method for computing possibly optimal policies in reinforcement learning with multiple objectives and tradeoffs includes receiving a dataset comprising state, action, and reward information for objectives in a multiple objective environment. tradeoff information indicating that a first vector comprising first values of the objectives in the multiple objective environment is preferred to a second vector comprising second values of the objectives in the multiple objective environment is received. a set of possibly optimal policies for the multiple objective environment is produced based on the dataset and the tradeoff information, where the set of possibly optimal policies indicates actions for an intelligent agent operating in the multiple objective environment to take.
Inventor(s): Prasanna Sattigeri of Acton MA (US) for international business machines corporation, Soumya Ghosh of Boston MA (US) for international business machines corporation, Inkit Padhi of White Plains NY (US) for international business machines corporation, Pierre L. Dognin of White Plains NY (US) for international business machines corporation, Kush Raj Varshney of Chappaqua NY (US) for international business machines corporation
IPC Code(s): G06N20/00, G06F17/16
Abstract: one or more systems, devices, computer program products and/or computer implemented methods of use provided herein relate to a process of mitigating biased training instances associated with a machine learning model without additional refitting of the machine learning model. a system can comprise a memory that stores computer executable components, and a processor that executed the computer executable components stored in the memory, wherein the computer executable components can comprise a training data influence estimation component and an influence mitigation component. the training data influence estimation component can receive a pre-trained machine learning model and calculate a fairness influence score of training instances on group fairness metrics associated with the pre-trained machine learning model. the influence mitigation component can perform post-hoc unfairness mitigation by removing the effect of at least one training instance based on the fairness influence score to mitigate biased training instances without refitting the pre-trained machine learning model.
Inventor(s): Amit DHURANDHAR of Yorktown Heights NY (US) for international business machines corporation, Karthikeyan NATESAN RAMAMURTHY of Pleasantville NY (US) for international business machines corporation, Kartik AHUJA of White Plains NY (US) for international business machines corporation, Vijay ARYA of Gurgaon (IN) for international business machines corporation
IPC Code(s): G06N20/00, G06K9/62
Abstract: techniques for generating explanations for machine learning (ml) are disclosed. these techniques include identifying an ml model, an output from the ml model, and a plurality of constraints, and generating a plurality of neighborhoods relating to the ml model based on the plurality of constraints. the techniques further include generating a predictor for each of the plurality of neighborhoods using the ml model and the plurality of constraints, constructing a combined predictor based on combining each of the respective predictors for the plurality of neighborhoods, and creating one or more explanations relating to the ml model and the output from the ml model using the combined predictor.
Inventor(s): Janice Yang of Cambridge MA (US) for international business machines corporation, Kate Hogan of St. Louis MO (US) for international business machines corporation, Arnav Aggarwal of Los Altos CA (US) for international business machines corporation, Ethan Weaver of Morgantown WV (US) for international business machines corporation, John S. Werner of Fishkill NY (US) for international business machines corporation
IPC Code(s): G06N20/00, G06N5/04
Abstract: in an approach, a processor receives, at an edge device running a local instance of a machine learning (ml) model, a set of inference data comprising a plurality of datapoints, wherein the local instance of the ml model is a deployed version of the ml model running in a cloud environment, and wherein the ml model was trained in the cloud environment and then deployed to the edge device. a processor runs the plurality of datapoints through one or more filters to determine a probability for each datapoint of whether a respective datapoint should be sent back to the cloud environment and used for retraining the ml model. a processor determines, for each datapoint, whether the probability for the respective datapoint meets a send back threshold that is required to be met before the respective datapoint is sent back to the cloud environment.
Inventor(s): Kavitha Hassan YOGARAJ of Bangalore (IN) for international business machines corporation, Frederik Frank FLOTHER of Schlieren (CH) for international business machines corporation, Vladimir RASTUNKOV of Mundelein IL (US) for international business machines corporation
IPC Code(s): G06N20/00
Abstract: provided are a computer-implemented method, a system, and a computer program product for futureproofing a machine learning model, in which historical data for updates and changes to a baseline machine learning model are received. a futureproofing metric is generated. an enhanced machine learning model comprising a futureproofed version of the baseline machine learning model is generated with the historical data and the baseline machine learning model as inputs.
Inventor(s): Dzung Tien Phan of Pleasantville NY (US) for international business machines corporation
IPC Code(s): G06Q10/06, G06Q50/06
Abstract: an embodiment includes receiving, by a transformer monitoring system associated with a transformer, sensor data from one or more sensors during operation of the transformer. the embodiment also includes generating, by the transformer monitoring system, energy loss data representative of a predicted energy loss of the transformer based at least in part on the sensor data. the embodiment also includes training, by the transformer monitoring system, a failure rate prediction model using failure data, resulting in a trained failure rate prediction model that calculates failure probability distribution data indicative of a time at which a failure of the transformer is most likely to occur. the embodiment also includes generating, by the transformer monitoring system, replacement data representative of an optimal time for replacing the transformer based at least in part on the energy loss data, the failure probability distribution data, and specification data for the transformer.
Inventor(s): Shivaram Subramanian of Frisco TX (US) for international business machines corporation, Pavithra Harsha of Pleasantville NY (US) for international business machines corporation, Ali Koc of WHITE PLAINS NY (US) for international business machines corporation, Brian Leo Quanz of Yorktown Heights NY (US) for international business machines corporation, Mahesh Ramakrishna of East Brunswick NJ (US) for international business machines corporation, Dhruv Shah of New York NY (US) for international business machines corporation
IPC Code(s): G06Q10/08, G06Q10/06
Abstract: mechanisms are provided for generating a resource allocation in an omnichannel distribution network. demand forecast data and current inventory data related to a resource and the omnichannel distribution network are obtained and an ally-adversary bimodal inventory optimization (bio) computer model is instantiated that includes an adversary component that simulates, through a computer simulation, a worst-case scenario of resource demand and resource availability, and an ally component that limits the adversary component based on a simulation of a limited best-case scenario of resource demand and resource availability. the bio computer model is applied to the demand forecast data and current inventory data, to generate a predicted consumption for the resource. a resource allocation recommendation is generated for allocating the resource to locations of the omnichannel distribution network based on the predicted consumption, which is output to a downstream computing system for further processing.
Inventor(s): Sudheesh S. Kairali of Kozhikode (IN) for international business machines corporation, Sarbajit K. Rakshit of Kolkata (IN) for international business machines corporation
IPC Code(s): G06Q10/00, G06Q10/06
Abstract: systems, methods and/or computer program products predictively automating configurations of modular service zones servicing physical assets, maximizing reuse of service zone(s) and optimizing time for servicing a plurality of physical assets. digital twin models of physical assets are classified, and arranged into workflows for the service zones, sequencing services performed on physical assets arriving at service centers and preparing service zones based on types of services requested, the estimated time of arrival and similarities between classifications of different digital twins of physical assets. based on sequences of the workflow, arrival times of physical assets and overlap between parts, tools, machines, etc., within various service zones, service center coordinates robotic systems to arrange service zones in a manner that minimizes waiting time between services, maximizes the number of physical assets repaired within a period of time and reduces rearrangement of service zones between the services provided to different physical assets.
Inventor(s): Sebastien Gilbert of Québec (CA) for international business machines corporation, Michele Merler of New York NY (US) for international business machines corporation, Dhiraj Joshi of Edison NJ (US) for international business machines corporation, Apurv Gupta of Vadodara (IN) for international business machines corporation, Shyama Prosad Chowdhury of Kolkata (IN) for international business machines corporation, CHIDANSH AMITKUMAR BHATT of Hightstown NY (US) for international business machines corporation, Nirmit V. Desai of Yorktown Heights NY (US) for international business machines corporation
IPC Code(s): G06T3/00, G06T3/40
Abstract: described are techniques for oblique image rectification. the techniques include receiving an original image depicting an oblique view of a circular object and pre-processing the original image into an edge image. the techniques further include generating, by a machine learning model based on the edge image, a heatmap including an ellipse formed by the oblique view of the circular object. the techniques further include computing ellipse parameters describing the ellipse of the heatmap. the techniques further include performing, using the ellipse parameters, an affine transformation on the original image to generate a rectified image, where the rectified image converts the ellipse to a circle.
Inventor(s): Sarbajit K. Rakshit of Kolkata (IN) for international business machines corporation, Saraswathi Sailaja Perumalla of Visakhapatnam (IN) for international business machines corporation, Ashwini Padubidri Chandrase of Austin TX (US) for international business machines corporation
IPC Code(s): G06T13/00, G06T19/00
Abstract: an embodiment for augmented reality (ar)-based visualization of an accidental situation in a multi-machine environment is provided. the embodiment may include receiving real-time and historical data relating to an activity. the embodiment may also include identifying a context of the activity and at least one property of one or more objects associated with the activity. the embodiment may further include identifying one or more items of safety equipment used by a user. the embodiment may also include assigning a compatibility score to the user. the embodiment may further include in response to determining the compatibility score is not adequate, executing a digital twin simulation of an avatar of the user. the embodiment may also include creating a visual animation of a resultant state of the avatar of the user consistent with the executed digital twin simulation. the embodiment may further include displaying the visual animation to the user.
Inventor(s): Fei Wang of Dalian (CN) for international business machines corporation, Xue Ping Liu of Beijing (CN) for international business machines corporation, Dan Zhang of Beijing (CN) for international business machines corporation, Yun Jing Zhao of Beijing (CN) for international business machines corporation, Kun Yan Yin of Ningbo (CN) for international business machines corporation, Zhi Xing Peng of Beijing (CN) for international business machines corporation, Jian Long Sun of Langfang, Hebei (CN) for international business machines corporation
IPC Code(s): G06V10/74, G06F16/532, G06F16/56, G06V10/22, G06V10/46, G06V10/75
Abstract: detecting fine-grained similarity in image includes determining a core area of a search image by generating an image salient map from a plurality of layers of the search image and determining a connected area based on the image salient map. feature descriptors are generated from the core area of the search image. a plurality of capsule vectors are generated from different ones of a plurality of keypoints of the feature descriptors. capsule vectors of the search image are compared with capsule vectors of each image of the dataset to generate a top-k matrix. similarity scores for the top-k matrix are calculated. one or more image of the dataset having fine-grained similarity with the search image are selected based a bundled similarity score for each image of the dataset. the bundled similarity score is a summation of the similarity scores of the image.
Inventor(s): Rajesh Kumar Saxena of Thane East (IN) for international business machines corporation, Harish Bharti of Pune (IN) for international business machines corporation, Pinaki Bhattacharya of Pune (IN) for international business machines corporation, Sandeep Sukhija of Rajasthan (IN) for international business machines corporation, Dinesh Wadekar of Pune (IN) for international business machines corporation
IPC Code(s): G06V10/764
Abstract: identifying an indistinct entity within an image can include generating by an image filter multiple gradients, each of which corresponds to one of a plurality of pixels of an image captured by an imager. the image can be searched for a likely repeating pattern. responsive to detecting, based on the multiple gradients, a likely repeating pattern within the image, data structures can be generated, the data structures comprising a set of probabilistically weighted feature vectors corresponding to the likely repeating pattern. a machine learning model can classify each of the set of probabilistically weighted feature vectors. an identity of the likely repeating pattern can be output, the identity based on the machine learning model classifications of the probabilistically weighted feature vectors.
Inventor(s): Hugo E. Rothuizen of Oberrieden (CH) for international business machines corporation, Mark Alfred Lantz of Adliswil (CH) for international business machines corporation, Jason Liang of Campbell CA (US) for international business machines corporation, Icko E. T. Iben of Santa Clara CA (US) for international business machines corporation
IPC Code(s): G11B5/187
Abstract: in an approach to improve write transducers a write transducer for recording data on a magnetic media is disclosed. the write transducer comprises a first pole piece. the write transducer further comprises a second pole piece. the first pole piece and the second pole piece are arranged in such a way, that a write gap is formed between the first pole piece and the second pole piece. a longitudinal axis is defined between opposite ends of the write gap. a length of the write gap along the longitudinal axis varies in the direction transverse to the longitudinal axis.
Inventor(s): Oscar van der Straten of Guilderland Center NY (US) for international business machines corporation, Chih-Chao Yang of Glenmont NY (US) for international business machines corporation, Koichi Motoyama of Clifton Park NY (US) for international business machines corporation
IPC Code(s): G11C11/16, H01L27/22, H01L43/02, H01L43/08
Abstract: a magnetic tunnel junction cell, a cross section with octagon profile, vertically aligned layers of a top electrode, a free layer, a tunneling barrier, a reference layer, a bottom electrode with tapered side surface with a width at an upper surface greater than a width at a lower surface, the reference layer with vertical side surface perpendicular to an upper horizontal surface of the bottom electrode, the free layer and the tunneling barrier, each include a tapered side surface of the same angle, and each include a width at an upper surface less than a width at a lower surface. forming a bottom electrode of a magnetic tunnel junction cell with a tapered side surface with a width at an upper surface greater than a width at a lower surface, forming a reference layer with vertical side surface perpendicular to an upper surface of the bottom electrode.
Inventor(s): Nicholas Anthony Lanzillo of Wynantskill NY (US) for international business machines corporation, Lawrence A. Clevenger of Saratoga Springs NY (US) for international business machines corporation, Hosadurga Shobha of Niskayuna NY (US) for international business machines corporation, Ruilong Xie of Niskayuna NY (US) for international business machines corporation, Baozhen Li of South Burlington VT (US) for international business machines corporation
IPC Code(s): H01L23/48, H01L21/768, H01L29/06, H01L29/08, H01L29/423, H01L29/786
Abstract: a semiconductor device includes a backside power rail, a backside ground rail, and a backside isolation rail between the backside power rail and the backside ground rail. the backside isolation rail may provide adequate electrical isolation between the backside power rail and the backside ground rail, thereby enabling the backside power rail and the backside ground rail to be located relatively near to one another. the backside isolation rail may also cure actual electrical shorts between the backside power rail and the backside ground rail.
Inventor(s): Francesco PREDA of New Braunfels TX (US) for international business machines corporation, Sungjun CHUN of Austin TX (US) for international business machines corporation, Jose A. HEJASE of Pflugerville TX (US) for international business machines corporation, Junyan TANG of Austin TX (US) for international business machines corporation, Pavel ROY PALADHI of Pflugerville TX (US) for international business machines corporation, Nam Huu PHAM of Round Rock TX (US) for international business machines corporation, Wiren Dale BECKER of Hyde Park NY (US) for international business machines corporation, Daniel Mark DREPS of Georgetown TX (US) for international business machines corporation
IPC Code(s): H01L23/498, H01L21/48
Abstract: an enhanced integrated circuit interconnect package, method and multiple-layer integrated circuit laminate structure enable increased routing density per layer and maintains signal integrity performance. a differential signal via pair of vertical interconnect vias provide differential signaling. the vias of the differential signal via pair are positioned closely spaced together with each via offset from a center axis of an associated lga contact, minimizing space between the differential signal vias and maintaining signal integrity performance, and providing increased available wiring signal channel.
Inventor(s): Reinaldo Vega of Mahopac NY (US) for international business machines corporation, Nicholas Anthony Lanzillo of Wynantskill NY (US) for international business machines corporation, Takashi Ando of Eastchester NY (US) for international business machines corporation, David Wolpert of Poughkeepsie NY (US) for international business machines corporation, Albert M. Chu of Nashua NH (US) for international business machines corporation, Albert M. Young of Fishkill NY (US) for international business machines corporation
IPC Code(s): H01L23/528, H01L21/3213, H01L21/768, H01L23/522
Abstract: a semiconductor structure is presented including a first level of interconnect wiring separated into a first interconnect wiring segment and a second interconnect wiring segment, the first interconnect wiring segment defining a first line segment and the second interconnect wiring segment defining a second line segment and a second level interconnect wiring positioned orthogonally to the first level of interconnect wiring. a distalmost end of the first line segment and a distalmost end of the second line segment are separated by a spacing less than or equal to a spacing of the second level interconnect wiring defining a zero track skip.
Inventor(s): Ruilong Xie of Niskayuna NY (US) for international business machines corporation, Nicholas Anthony Lanzillo of Wynantskill NY (US) for international business machines corporation, Lawrence A. Clevenger of Saratoga Springs NY (US) for international business machines corporation, Hosadurga Shobha of Niskayuna NY (US) for international business machines corporation, Huai Huang of Clifton Park NY (US) for international business machines corporation
IPC Code(s): H01L23/528, H01L21/8238, H01L23/522, H01L27/092, H01L29/08, H01L29/40, H01L29/417, H01L29/423, H01L29/66, H01L29/775
Abstract: an integrated circuit structure includes a power supply rail formed in a backside of a semiconductor wafer. the integrated circuit structure also includes a frontside beol wire layer connected to the power supply rail through a gate, wherein the gate is of a type to be powered off by a power supply coupled through the gate from the power supply rail to the first frontside beol wire layer. a method of forming an integrated circuit structure includes forming a power supply rail in a backside of a semiconductor wafer, forming a gate in the semiconductor wafer, and forming a frontside beol wire layer connected to the power supply rail through the gate. again, the gate is of a type to be powered off by a power supply coupled through the gate from the power supply rail to the first frontside beol wire layer.
Inventor(s): Nikhil Jain of Apple Valley MN (US) for international business machines corporation, Prabudhya Roy Chowdhury of Albany NY (US) for international business machines corporation, Kisik Choi of Watervliet NY (US) for international business machines corporation, Ruilong Xie of Niskayuna NY (US) for international business machines corporation
IPC Code(s): H01L23/528, H01L21/768, H01L23/48, H01L27/12
Abstract: a semiconductor device includes: a channel having layers of silicon separated from each other; a metal gate in contact with the layers of silicon; source/drain regions adjacent to the metal gate; a frontside power rail extending through the layers of silicon; a dielectric separating the frontside power rail from the metal gate; a via-connect buried power rail extending through the dielectric and coupling the frontside power rail to the source/drain regions; and a backside power rail coupled to the frontside power rail. the layers of silicon are wrapped on three sides by the metal gate.
Inventor(s): Rajiv Joshi of Yorktown Heights NY (US) for international business machines corporation, Ruilong Xie of Niskayuna NY (US) for international business machines corporation
IPC Code(s): H01L23/528, H01L21/768
Abstract: embodiments of the present invention are directed to processing methods and resulting structures for providing a virtual power supply through a wafer backside. in a non-limiting embodiment of the invention, a front end of line structure having a gate is formed and a back end of line structure is formed on a first surface of the front end of line structure. a backside power delivery network is formed on a second surface of the front end of line structure opposite the first surface. source and drain regions on a first side of the gate are connected to the backside power delivery network and source and drain regions on a second side of the gate are connected to the back end of line structure.
Inventor(s): Ruilong Xie of Niskayuna NY (US) for international business machines corporation, Nicholas Anthony Lanzillo of Wynantskill NY (US) for international business machines corporation, Brent A. Anderson of Jericho VT (US) for international business machines corporation, REINALDO VEGA of Mahopac NY (US) for international business machines corporation, Albert M. Chu of Nashua NH (US) for international business machines corporation, Lawrence A. Clevenger of Saratoga Springs NY (US) for international business machines corporation
IPC Code(s): H01L29/417, H01L23/528, H01L29/06, H01L29/08, H01L29/40, H01L29/423, H01L29/66, H01L29/775
Abstract: embodiments of present invention provide a semiconductor structure. the semiconductor structure includes a semiconductor wafer having a first transistor and a second transistor; a first source/drain (s/d) contact of the first transistor; a second s/d contact of the second transistor; and a cut region between the first s/d contact and the second s/d contact, wherein the cut region includes a liner of a first dielectric material and a filler of a second dielectric material that is different from the first dielectric material, the liner lining at least a part of the first s/d contact and a part of the second s/d contact, and the filler being directly adjacent to the liner and between the first s/d contact and the second s/d contact. a method of manufacturing the semiconductor structure is also provided.
Inventor(s): Sergey Rylov of White Plains NY (US) for international business machines corporation, John Francis Bulzacchelli of Somers NY (US) for international business machines corporation, Matthew Beck of Danbury CT (US) for international business machines corporation
IPC Code(s): H03K19/195, H03K19/20
Abstract: a device includes a logic circuit comprising a clockless single flux quantum logic gate which comprises a plurality of input ports, an output port, an output josephson junction, and a plurality of dynamic storage loop circuits and isolation buffer circuits. the output josephson junction is coupled to an output of each dynamic storage loop circuit and configured to drive the output port. each isolation buffer circuit is coupled to a respective input port, and a respective dynamic storage loop circuit and configured to absorb a circulating current of an antifluxon which is injected into the respective dynamic storage loop circuit to prevent the antifluxon from being output from the respective input port, and to inject a fluxon into the respective dynamic storage loop circuit in response to a single flux quantum pulse applied to the respective input port, and annihilate an antifluxon present in the respective dynamic storage loop circuit.
Inventor(s): Allon Adir of Kiryat Tivon (IL) for international business machines corporation, Ramy Masalha of Kafr Qari (IL) for international business machines corporation, Ehud Aharoni of Kfar Saba (IL) for international business machines corporation
IPC Code(s): H04L9/00, H04L9/06
Abstract: a method, apparatus and computer program product for privacy-preserving homomorphic inferencing. in response to receipt of encrypted data, a ciphertext of real numbers is generated. each real number has an associated sign that is desired to be maintained. a mask is then identified, preferably via an iterative algorithm that works on a trial and error basis to locate an appropriate solution. the mask comprises set of values randomly distributed over a given positive range and that remain positive after encoding under a fixed-point arithmetic and with a low scale value. under homomorphic encryption, the ciphertext is then multiplied by the mask to generate a result comprising values corresponding to the real numbers in the ciphertext and that maintain their associated signs. the result is provided as a response to the encrypted data.
Inventor(s): Andrew C. M. Hicks of Highland NY (US) for international business machines corporation, Michael Terrence Cohoon of Fishkill NY (US) for international business machines corporation
IPC Code(s): H04L41/16, H04L41/0631
Abstract: one or more systems, devices, computer program products and/or computer-implemented methods provided herein relate to data drift detection in an edge device. a system can comprise a memory configured to store computer executable components; and a processor configured to execute the computer executable components stored in the memory, wherein the computer executable components can comprise a verification component that can verify accuracy of a first model and accuracy of a second model to detect data drift associated with an edge device that is deployed without network connectivity; a computation component that can compute at least a first ratio based on the accuracy of the first model and the accuracy of the second model; and an analysis component that can use the at least the first ratio to determine whether performance degradation of at least one of the first model or the second model is a function of the data drift.
Inventor(s): Kushal S. Patel of PUNE (IN) for international business machines corporation, Gandhi Sivakumar of Bentleigh (AU) for international business machines corporation, Sarvesh S. Patel of Pune (IN) for international business machines corporation
IPC Code(s): H04L45/02, H04L41/0806
Abstract: a computer-implemented method for processing data connection requests is provided. the computer-implemented method includes receiving a connection request from an edge device and responding to the edge device such that the edge device recognizes that a connection is established and that data cannot be sent. the method further includes receiving a response from the edge device indicative of a connection parameter, determining that the connection is fiber-allocatable in accordance with the connection parameter being of a first connection parameter type, selecting one fiber from a plurality of fibers to have the connection allocated thereto based on one or more rules of fiber selection responsive to the determining that the connection is fiber-allocatable and allocating the connection to the one fiber.
Inventor(s): MUDHAKAR SRIVATSA of White Plains NY (US) for international business machines corporation, Davis Wertheimer of White Plains NY (US) for international business machines corporation, Franck Vinh Le of West Palm Beach FL (US) for international business machines corporation, Utpal Mangla of Toronto (CA) for international business machines corporation, SATISHKUMAR SADAGOPAN of Leawood KS (US) for international business machines corporation, Mathews Thomas of Flower Mound TX (US) for international business machines corporation, Dinesh C. Verma of New Castle NY (US) for international business machines corporation
IPC Code(s): H04L9/40, H04L41/16, H04L43/04
Abstract: embodiments related to using a foundational model for network packet traces. a technique includes receiving network traffic of a network and extracting features from the network traffic, the features having a function related to communications in the network. the technique includes generating tokens from the features, each of the features corresponding to a respective one of the tokens, training a machine learning model by inputting the tokens, the machine learning model being trained to output contextual embeddings for the tokens, and using the contextual embeddings to determine an anomaly in the network traffic.
Inventor(s): Jia Liu of BEIJING (CN) for international business machines corporation, Zhan Peng Huo of BEIJING (CN) for international business machines corporation, Qi Li of BEIJING (CN) for international business machines corporation, Yan Fei Qin of BEIJING (CN) for international business machines corporation, Lu Yan Li of BEIJING (CN) for international business machines corporation
IPC Code(s): H04N7/15, G06F3/14, H04L12/18
Abstract: a computer-implemented method for managing information during a web conference is provided. the computer-implemented method includes collecting and formatting meeting application information at a processor of a computing device having a screen being shared with attendees of the web conference and collecting and formatting to-be-popup application information at the processor. the computer-implemented method further includes analyzing, by the processor, an urgency of the to-be-popup application information and a correlation between the to-be-popup application information and the meeting application information and determining, by the processor, whether to share the to-be-popup application information with a user of the computing device and with the attendees based on results of the analyzing.
Inventor(s): James D. BIELICK of Pine Island MN (US) for international business machines corporation, Theron Lee LEWIS of Rochester MN (US) for international business machines corporation, David J. BRAUN of St. Charles MN (US) for international business machines corporation, John R. DANGLER of Rochester MN (US) for international business machines corporation, Timothy P. YOUNGER of Rochester MN (US) for international business machines corporation, Stephen Michael HUGO of Stewartville MN (US) for international business machines corporation, Timothy JENNINGS of Rochester MN (US) for international business machines corporation
IPC Code(s): H05K1/11, H05K3/00, H05K3/30
Abstract: a method of fabricating a multilayer circuit board is provided which includes forming a layer of a the multilayer circuit board with an internal clearance region having a modified voltage-to-ground clearance of conductive material adjacent to an aperture of the multilayer circuit board. the modified voltage-to-ground clearance of conductive material is based on a configuration of a connector pin to be press-fit connected within the aperture of the multilayer circuit board, and the internal clearance region is enlarged in a direction of greatest normal force outward from the aperture with insertion of the connector pin into the aperture.
Inventor(s): Theron Lee Lewis of Rochester MN (US) for international business machines corporation, Timothy P. Younger of Rochester MN (US) for international business machines corporation, David J. Braun of St. Charles MN (US) for international business machines corporation, John R. Dangler of Rochester MN (US) for international business machines corporation
IPC Code(s): H05K3/34
Abstract: a method for forming an electronic device that includes solder bonding pins from a component to plated through holes of a board, the component being positioned on a first side of the board; and applying solder paste to openings of the plated through holes on a second side of the board opposite the first side of the board that the component is positioned on. the method can further include drawing the solder paste to the pins to provide a reworked solder bond bonding at least one of the pins to the plated through hole.
Inventor(s): Aaron Finck of White Plains NY (US) for international business machines corporation, John Blair of Katonah NY (US) for international business machines corporation, April Carniol of Ossining NY (US) for international business machines corporation, Oliver Dial of Yorktown Heights NY (US) for international business machines corporation, Muir Kumph of Croton on Hudson NY (US) for international business machines corporation
IPC Code(s): H10N69/00, G06N10/40, G06N10/70, H10N60/12, H10N60/80
Abstract: devices and/or computer-implemented methods to facilitate zz cancellation between qubits are provided. according to an embodiment, a device can comprise a coupler device that operates in a first oscillating mode and a second oscillating mode. the device can further comprise a first superconducting qubit coupled to the coupler device based on a first oscillating mode structure corresponding to the first oscillating mode and based on a second oscillating mode structure corresponding to the second oscillating mode. the device can further comprise a second superconducting qubit coupled to the coupler device based on the first oscillating mode structure and the second oscillating mode structure.
INTERNATIONAL BUSINESS MACHINES CORPORATION patent applications on April 25th, 2024
- INTERNATIONAL BUSINESS MACHINES CORPORATION
- B23D75/00
- International business machines corporation
- B29C64/393
- B33Y50/02
- B64C39/02
- B64D47/00
- F25D3/10
- H01P3/00
- G05B19/4061
- G05B19/418
- G05D1/00
- G05D1/02
- G06F3/06
- G06F7/483
- G06F7/544
- G06F8/33
- G06F9/448
- G06F11/14
- G06F9/50
- G06F9/52
- G06F12/1027
- G06N20/00
- G06F16/2453
- G06F11/34
- G06F21/62
- G06F16/28
- H04L41/084
- G06F21/64
- G06F16/27
- G06F30/398
- G06N3/04
- G06N3/092
- G06F40/253
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- G06F40/279
- G06F40/295
- G06F40/216
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- G06N3/047
- G06N3/088
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- G06N10/40
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- G06K9/62
- G06N5/04
- G06Q10/06
- G06Q50/06
- G06Q10/08
- G06Q10/00
- G06T3/00
- G06T3/40
- G06T13/00
- G06T19/00
- G06V10/74
- G06F16/532
- G06F16/56
- G06V10/22
- G06V10/46
- G06V10/75
- G06V10/764
- G11B5/187
- G11C11/16
- H01L27/22
- H01L43/02
- H01L43/08
- H01L23/48
- H01L21/768
- H01L29/06
- H01L29/08
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- H01L23/498
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- H03K19/195
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- H04L9/00
- H04L9/06
- H04L41/16
- H04L41/0631
- H04L45/02
- H04L41/0806
- H04L9/40
- H04L43/04
- H04N7/15
- G06F3/14
- H04L12/18
- H05K1/11
- H05K3/00
- H05K3/30
- H05K3/34
- H10N69/00
- G06N10/70
- H10N60/12
- H10N60/80
