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| − | '''Summary of the patent applications from CHANGXIN MEMORY TECHNOLOGIES, INC. on November 30th, 2023'''
| + | ==Patent applications for changxin memory technologies, on November 30th, 2023== |
| − | | |
| − | CHANGXIN MEMORY TECHNOLOGIES, INC. has recently filed several patents related to semiconductor structures and manufacturing methods. These patents aim to improve the performance, functionality, and capacity of memory devices.
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| − | | |
| − | Summary:
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| − | - The patents describe various semiconductor structures consisting of bonded layers, redistribution lines, word lines, bit lines, and isolation layers.
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| − | - The manufacturing methods involve forming active areas, word line structures, bit line structures, and capacitor structures on substrates.
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| − | - The designs focus on optimizing the contact between different layers, improving the storage capacity of capacitances, and enhancing production efficiency.
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| − | - Notable applications include memory cell arrays, control chips, storage chips, and transistor designs with metal oxide semiconductor layers.
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| − | | |
| − | Bullet points:
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| − | * CHANGXIN MEMORY TECHNOLOGIES, INC. has filed recent patents related to semiconductor structures and manufacturing methods.
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| − | * The patents aim to improve the performance, functionality, and capacity of memory devices.
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| − | * The designs involve bonded layers, redistribution lines, word lines, bit lines, and isolation layers.
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| − | * The manufacturing methods include forming active areas, word line structures, bit line structures, and capacitor structures on substrates.
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| − | * The patents focus on optimizing contact between layers, increasing storage capacity, and enhancing production efficiency.
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| − | * Applications include memory cell arrays, control chips, storage chips, and transistor designs with metal oxide semiconductor layers.
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| − | Notable applications:
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| − | * Memory cell arrays with optimized word lines and bit lines.
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| − | * Transistor designs utilizing metal oxide semiconductor layers in the channel layer.
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| − | * Capacitor structures with increased storage capacity and improved production efficiency.
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| − | ==Patent applications for CHANGXIN MEMORY TECHNOLOGIES, INC. on November 30th, 2023== | |
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| − | ===PACKAGE SUBSTRATE, APPARATUS FOR TESTING POWER SUPPLY NOISE AND METHOD FOR TESTING POWER SUPPLY NOISE ([[US Patent Application 17951625. PACKAGE SUBSTRATE, APPARATUS FOR TESTING POWER SUPPLY NOISE AND METHOD FOR TESTING POWER SUPPLY NOISE simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|17951625]])===
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| − | '''Main Inventor'''
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| − | | |
| − | Honglong SHI
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| − | | |
| − | | |
| − | ===METHOD AND DEVICE FOR EVALUATING PERFORMANCE OF SEQUENTIAL LOGIC ELEMENT ([[US Patent Application 17872479. METHOD AND DEVICE FOR EVALUATING PERFORMANCE OF SEQUENTIAL LOGIC ELEMENT simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|17872479]])===
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| − | | |
| − | | |
| − | '''Main Inventor'''
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| − | | |
| − | Zengquan WU
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| − | | |
| − | | |
| − | ===DATA PROCESSING CIRCUITRY AND METHOD, AND SEMICONDUCTOR MEMORY ([[US Patent Application 18448891. DATA PROCESSING CIRCUITRY AND METHOD, AND SEMICONDUCTOR MEMORY simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|18448891]])===
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| − | | |
| − | | |
| − | '''Main Inventor'''
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| − | | |
| − | Yinchuan GU
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| − | | |
| − | | |
| − | ===METHOD AND APPARATUS FOR TESTING COMMAND, TEST PLATFORM, AND READABLE STORAGE MEDIUM ([[US Patent Application 17899056. METHOD AND APPARATUS FOR TESTING COMMAND, TEST PLATFORM, AND READABLE STORAGE MEDIUM simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|17899056]])===
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| − | | |
| − | | |
| − | '''Main Inventor'''
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| − | | |
| − | Yu LI
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| − | | |
| − | | |
| − | ===METHOD AND APPARATUS FOR CHECKING SIGNAL LINE ([[US Patent Application 17898727. METHOD AND APPARATUS FOR CHECKING SIGNAL LINE simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|17898727]])===
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| − | | |
| − | | |
| − | '''Main Inventor'''
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| − | | |
| − | Min MIN
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| − | | |
| − | | |
| − | ===TIMING SEQUENCE CONTROL CIRCUIT, TIMING SEQUENCE CONTROL METHOD, AND SEMICONDUCTOR MEMORY ([[US Patent Application 18169159. TIMING SEQUENCE CONTROL CIRCUIT, TIMING SEQUENCE CONTROL METHOD, AND SEMICONDUCTOR MEMORY simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|18169159]])===
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| − | | |
| − | | |
| − | '''Main Inventor'''
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| − | | |
| − | Kangling JI
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| − | | |
| − | | |
| − | ===REFRESH ADDRESS GENERATION CIRCUIT AND METHOD, MEMORY, AND ELECTRONIC DEVICE ([[US Patent Application 18332706. REFRESH ADDRESS GENERATION CIRCUIT AND METHOD, MEMORY, AND ELECTRONIC DEVICE simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|18332706]])===
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| − | | |
| − | | |
| − | '''Main Inventor'''
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| − | | |
| − | Yinchuan GU
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| − | | |
| − | | |
| − | ===REFRESH ADDRESS GENERATION CIRCUIT ([[US Patent Application 18153312. REFRESH ADDRESS GENERATION CIRCUIT simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|18153312]])===
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| − | | |
| − | | |
| − | '''Main Inventor'''
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| − | | |
| − | Yinchuan GU
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| − | | |
| − | | |
| − | ===REFRESH CONTROL CIRCUIT, MEMORY, AND REFRESH CONTROL METHOD ([[US Patent Application 18157558. REFRESH CONTROL CIRCUIT, MEMORY, AND REFRESH CONTROL METHOD simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|18157558]])===
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| − | | |
| − | | |
| − | '''Main Inventor'''
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| − | | |
| − | Liang ZHANG
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| − | | |
| − | | |
| − | ===SIGNAL SAMPLING CIRCUIT AND SEMICONDUCTOR MEMORY ([[US Patent Application 18449060. SIGNAL SAMPLING CIRCUIT AND SEMICONDUCTOR MEMORY simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|18449060]])===
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| − | | |
| − | | |
| − | '''Main Inventor'''
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| − | | |
| − | Zequn HUANG
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| − | | |
| − | | |
| − | ===POWER SUPPLY SWITCHING CIRCUIT AND MEMORY ([[US Patent Application 18327062. POWER SUPPLY SWITCHING CIRCUIT AND MEMORY simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|18327062]])===
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| − | | |
| − | | |
| − | '''Main Inventor'''
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| − | | |
| − | Yupeng FAN
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| − | | |
| − | | |
| − | ===SIGNAL SAMPLING CIRCUIT AND SEMICONDUCTOR MEMORY ([[US Patent Application 18448897. SIGNAL SAMPLING CIRCUIT AND SEMICONDUCTOR MEMORY simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|18448897]])===
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| − | | |
| − | | |
| − | '''Main Inventor'''
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| − | | |
| − | Zequn HUANG
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| − | | |
| − | | |
| − | ===METHOD FOR SENSE MARGIN DETECTION FOR SENSE AMPLIFIER AND ELECTRONIC DEVICE ([[US Patent Application 17868774. METHOD FOR SENSE MARGIN DETECTION FOR SENSE AMPLIFIER AND ELECTRONIC DEVICE simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|17868774]])===
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| − | | |
| − | | |
| − | '''Main Inventor'''
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| − | | |
| − | Xikun CHU
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| − | | |
| − | | |
| − | ===ANTI-FUSE STRUCTURE, ANTI-FUSE ARRAY AND MEMORY ([[US Patent Application 17929747. ANTI-FUSE STRUCTURE, ANTI-FUSE ARRAY AND MEMORY simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|17929747]])===
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| − | | |
| − | | |
| − | '''Main Inventor'''
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| − | | |
| − | Chuangming HOU
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| − | | |
| − | | |
| − | ===CIRCUIT FOR CALIBRATION CONTROL, ELECTRONIC DEVICE AND METHOD FOR CALIBRATION CONTROL ([[US Patent Application 18448340. CIRCUIT FOR CALIBRATION CONTROL, ELECTRONIC DEVICE AND METHOD FOR CALIBRATION CONTROL simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|18448340]])===
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| − | | |
| − | | |
| − | '''Main Inventor'''
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| − | | |
| − | Kai TIAN
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| − | | |
| − | ===SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF ([[US Patent Application 17815623. SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|17815623]])===
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| − | | |
| − | | |
| − | '''Main Inventor'''
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| − | | |
| − | Yi TANG
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| − | | |
| − | | |
| − | ===SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING SEMICONDUCTOR STRUCTURE ([[US Patent Application 18167024. SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING SEMICONDUCTOR STRUCTURE simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|18167024]])===
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| − | '''Main Inventor'''
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| − | | |
| − | Peimeng WANG
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| − | | |
| − | | |
| − | ===SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF ([[US Patent Application 17887775. SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|17887775]])===
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| − | | |
| − | | |
| − | '''Main Inventor'''
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| − | | |
| − | Yongxiang LI
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| − | | |
| − | | |
| − | ===SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING SEMICONDUCTOR STRUCTURE ([[US Patent Application 18163135. SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING SEMICONDUCTOR STRUCTURE simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|18163135]])===
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| − | | |
| − | | |
| − | '''Main Inventor'''
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| − | | |
| − | YOUMING LIU
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| − | | |
| − | | |
| − | ===SEMICONDUCTOR STRUCTURE AND FORMATION METHOD THEREOF ([[US Patent Application 17878046. SEMICONDUCTOR STRUCTURE AND FORMATION METHOD THEREOF simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|17878046]])===
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| − | | |
| − | | |
| − | '''Main Inventor'''
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| − | | |
| − | Xiaojie LI
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| − | | |
| − | | |
| − | ===SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF ([[US Patent Application 18150885. SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|18150885]])===
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| − | | |
| − | | |
| − | '''Main Inventor'''
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| − | | |
| − | Yang CHEN
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| − | | |
| − | | |
| − | ===SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING SEMICONDUCTOR STRUCTURE ([[US Patent Application 18093779. SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING SEMICONDUCTOR STRUCTURE simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|18093779]])===
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| − | | |
| − | | |
| − | '''Main Inventor'''
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| − | | |
| − | Xiaojie LI
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| − | | |
| − | | |
| − | ===METHOD FOR FORMING CAPACITOR AND SEMICONDUCTOR DEVICE ([[US Patent Application 18446507. METHOD FOR FORMING CAPACITOR AND SEMICONDUCTOR DEVICE simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|18446507]])===
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| − | | |
| − | | |
| − | '''Main Inventor'''
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| − | | |
| − | Xiaoling WANG
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| − | | |
| − | | |
| − | ===SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF ([[US Patent Application 17816130. SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|17816130]])===
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| − | | |
| − | | |
| − | '''Main Inventor'''
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| − | | |
| − | YOUMING LIU
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| − | | |
| − | | |
| − | ===MANUFACTURING METHOD OF SEMICONDUCTOR STRUCTURE, SEMICONDUCTOR STRUCTURE, AND MEMORY ([[US Patent Application 18363901. MANUFACTURING METHOD OF SEMICONDUCTOR STRUCTURE, SEMICONDUCTOR STRUCTURE, AND MEMORY simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|18363901]])===
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| − | | |
| − | | |
| − | '''Main Inventor'''
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| − | | |
| − | Yizhi ZENG
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| − | | |
| − | | |
| − | ===SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING SEMICONDUCTOR STRUCTURE ([[US Patent Application 18446514. SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING SEMICONDUCTOR STRUCTURE simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|18446514]])===
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| − | | |
| − | '''Main Inventor'''
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| − | | |
| − | Shuai GUO
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| − | | |
| − | ===SEMICONDUCTOR STRUCTURE ([[US Patent Application 17879913. SEMICONDUCTOR STRUCTURE simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|17879913]])===
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| − | | |
| − | | |
| − | '''Main Inventor'''
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| − | | |
| − | Jianfeng XIAO
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| − | | |
| − | | |
| − | ===TRANSISTOR AND MANUFACTURING METHOD THEREOF, AND MEMORY ([[US Patent Application 17816156. TRANSISTOR AND MANUFACTURING METHOD THEREOF, AND MEMORY simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|17816156]])===
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| − | | |
| − | | |
| − | '''Main Inventor'''
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| − | | |
| − | YOUMING LIU
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| − | | |
| − | | |
| − | ===TRANSISTOR AND MANUFACTURING METHOD THEREOF, AND MEMORY ([[US Patent Application 17816435. TRANSISTOR AND MANUFACTURING METHOD THEREOF, AND MEMORY simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|17816435]])===
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| − | | |
| − | | |
| − | '''Main Inventor'''
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| − | | |
| − | YOUMING LIU
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| − | | |
| − | | |
| − | ===SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF ([[US Patent Application 17816436. SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|17816436]])===
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| − | | |
| − | | |
| − | '''Main Inventor'''
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| − | | |
| − | YOUMING LIU
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| − | | |
| − | | |
| − | ===METHOD OF MANUFACTURING SEMICONDUCTOR STRUCTURE AND SEMICONDUCTOR STRUCTURE ([[US Patent Application 17929842. METHOD OF MANUFACTURING SEMICONDUCTOR STRUCTURE AND SEMICONDUCTOR STRUCTURE simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|17929842]])===
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| − | | |
| − | | |
| − | '''Main Inventor'''
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| − | | |
| − | Yi TANG
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| − | | |
| − | | |
| − | ===SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF ([[US Patent Application 17813409. SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|17813409]])===
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| − | | |
| − | '''Main Inventor'''
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| − | | |
| − | Youming Liu
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| − | | |
| − | | |
| − | ===MEMORY, SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING SAME ([[US Patent Application 17885727. MEMORY, SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING SAME simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|17885727]])===
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| − | | |
| − | '''Main Inventor'''
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| − | | |
| − | Jingwen LU
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| − | | |
| − | ===SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING SAME ([[US Patent Application 18151360. SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING SAME simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|18151360]])===
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| − | | |
| − | | |
| − | '''Main Inventor'''
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| − | | |
| − | Kanyu CAO
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| − | ===SEMICONDUCTOR STRUCTURE AND METHOD FOR PREPARING SAME ([[US Patent Application 17899684. SEMICONDUCTOR STRUCTURE AND METHOD FOR PREPARING SAME simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|17899684]])===
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| − | | |
| − | '''Main Inventor'''
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| − | | |
| − | Min LI
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| − | | |
| − | | |
| − | ===TRANSISTOR, MANUFACTURING METHOD THEREOF, AND MEMORY ([[US Patent Application 18151434. TRANSISTOR, MANUFACTURING METHOD THEREOF, AND MEMORY simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|18151434]])===
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| − | | |
| − | | |
| − | '''Main Inventor'''
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| − | | |
| − | CHUN-WEI LIAO
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| − | | |
| − | | |
| − | ===METHOD OF MANUFACTURING SEMICONDUCTOR STRUCTURE, SEMICONDUCTOR STRUCTURE, AND MEMORY ([[US Patent Application 18363819. METHOD OF MANUFACTURING SEMICONDUCTOR STRUCTURE, SEMICONDUCTOR STRUCTURE, AND MEMORY simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|18363819]])===
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| − | | |
| − | '''Main Inventor'''
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| − | | |
| − | Jingwen LU
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| − | | |
| − | | |
| − | ===SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF ([[US Patent Application 17816438. SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|17816438]])===
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| − | | |
| − | | |
| − | '''Main Inventor'''
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| − | | |
| − | YOUMING LIU
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| − | | |
| − | | |
| − | ===METHOD OF MANUFACTURING SEMICONDUCTOR STRUCTURE AND SEMICONDUCTOR STRUCTURE ([[US Patent Application 18363833. METHOD OF MANUFACTURING SEMICONDUCTOR STRUCTURE AND SEMICONDUCTOR STRUCTURE simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|18363833]])===
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| − | | |
| − | | |
| − | '''Main Inventor'''
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| − | | |
| − | Jingwen LU
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| − | | |
| − | | |
| − | ===SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME ([[US Patent Application 18169839. SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)|18169839]])===
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| − | | |
| − | '''Main Inventor'''
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| − | | |
| − | Chao LIN
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