Apple inc. (20240136919). PFC DESIGN TECHNIQUE FOR HIGH PEAK LOAD simplified abstract

PFC DESIGN TECHNIQUE FOR HIGH PEAK LOAD

Organization Name

apple inc.

Inventor(s)

Chanwit Prasantanakorn of Santa Clara CA (US)

Bharat K Patel of San Martin CA (US)

PFC DESIGN TECHNIQUE FOR HIGH PEAK LOAD - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240136919 titled 'PFC DESIGN TECHNIQUE FOR HIGH PEAK LOAD

Simplified Explanation

The patent application describes a power factor correction circuit that increases the peak load capacity by controlling the input current to be in phase with the input voltage and producing a clipped sinusoidal input current.

• The power factor correction circuit includes an input for receiving a rectified AC input voltage.
• At least one switching device is used to control the input current to be in phase with the input voltage.
• Control circuitry is employed to control the switching device to produce a clipped sinusoidal input current.
• The switching device can operate in a critical conduction mode.
• An inductor with an inductor current controlled by the switching device and control circuitry is included in the circuit.
• The inductor is sized for a peak current corresponding to the peak of the clipped sinusoidal input current.

Potential Applications

This technology can be applied in power supplies, LED drivers, and other electronic devices requiring power factor correction to improve efficiency and reduce harmonic distortion.

Problems Solved

This technology solves the problem of low power factor and inefficient power usage in electronic devices, leading to improved performance and energy savings.

Benefits

The benefits of this technology include increased peak load capacity, improved power factor correction, reduced harmonic distortion, and enhanced efficiency in electronic devices.

Potential Commercial Applications of this Technology

• "Enhancing Power Factor Correction in Electronic Devices for Improved Efficiency and Performance"

Possible Prior Art

One possible prior art for this technology could be traditional power factor correction circuits that do not utilize clipped sinusoidal input currents for increasing peak load capacity.

How does the control circuitry determine the optimal clipping level for the sinusoidal input current?

The patent application does not provide specific details on how the control circuitry calculates or determines the optimal clipping level for the sinusoidal input current.

What are the potential challenges or limitations of implementing this power factor correction circuit in practical applications?

The patent application does not address any potential challenges or limitations that may arise when implementing this power factor correction circuit in real-world electronic devices.

Original Abstract Submitted

a power factor correction circuit can include an input that receives a rectified ac input voltage; at least one switching device operable to control an input current of the power factor correction circuit to be in phase with the rectified ac input voltage; and control circuitry that controls the at least one switching device to produce a clipped sinusoidal input current, thereby increasing peak load capacity of the power factor correction circuit. the control circuitry can operate the at least one switching device in a critical conduction mode. the power factor correction circuit can further include an inductor having an inductor current therethrough controlled by the at least one switching device and the control circuitry. the inductor can be sized for a peak current corresponding to a peak of the clipped sinusoidal input current.