18532553. DFE IMPLEMENTATION FOR WIRELINE APPLICATIONS simplified abstract (Texas Instruments Incorporated)

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DFE IMPLEMENTATION FOR WIRELINE APPLICATIONS

Organization Name

Texas Instruments Incorporated

Inventor(s)

Raghu Ganesan of Bangalore (IN)

Kalpesh Rajai of Bangalore (IN)

DFE IMPLEMENTATION FOR WIRELINE APPLICATIONS - A simplified explanation of the abstract

This abstract first appeared for US patent application 18532553 titled 'DFE IMPLEMENTATION FOR WIRELINE APPLICATIONS

Simplified Explanation

The patent application describes a decision feedback equalizer (DFE) with multiple paths and filters for processing communication symbols received from a communication channel.

  • N-bit parallel input for receiving consecutive communication symbols
  • First DFE path with a path input, adder, and filter
  • Second DFE path for processing a second communication symbol
  • Slicers and multiplexers in each path for signal processing

Potential Applications

The technology described in the patent application could be applied in various communication systems, such as wireless communication, digital signal processing, and data transmission.

Problems Solved

The DFE helps in reducing intersymbol interference and improving the overall signal quality in communication systems by processing received symbols and providing feedback for equalization.

Benefits

- Improved signal quality and data transmission reliability - Enhanced performance in noisy communication channels - Efficient processing of consecutive communication symbols

Potential Commercial Applications

"Enhancing Communication Systems with Decision Feedback Equalizer Technology"

Possible Prior Art

There may be prior art related to decision feedback equalizers in communication systems, digital signal processing, and equalization techniques.

Unanswered Questions

How does the DFE adapt to different types of communication channels?

The patent application does not specify how the DFE can adjust its parameters based on the characteristics of the communication channel.

What is the computational complexity of the DFE compared to other equalization techniques?

The patent application does not provide information on the computational requirements of the DFE in comparison to existing equalization methods.


Original Abstract Submitted

Disclosed embodiments include a decision feedback equalizer (DFE) comprising an N-bit parallel input adapted to be coupled to a communication channel and configured to receive consecutive communication symbols, a first DFE path including a first path input configured to receive communication symbols, and a first adder having a first adder input coupled to the first path input. There is a first DFE filter having outputs responsive to the first DFE filter inputs, the outputs coupled to the second adder input. The DFE includes a first path having a first slicer and a first multiplexer, a first path multiplexer output, and a second DFE path including a second path input configured to receive a second communication symbol, a second adder, a second DFE filter, a second slicer, and a second multiplexer.