18526360. SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF simplified abstract (Taiwan Semiconductor Manufacturing Co., Ltd.)

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

Organization Name

Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor(s)

Han-Yu Lin of Nantou County (TW)

Fang-Wei Lee of Hsinchu City (TW)

Kai-Tak Lam of Hsinchu City (TW)

Raghunath Putikam of Hsinchu City (TW)

Tzer-Min Shen of Hsinchu City (TW)

Li-Te Lin of Hsinchu City (TW)

Pinyen Lin of Rochester NY (US)

Cheng-Tzu Yang of Hsinchu County (TW)

Tzu-Li Lee of Yunlin County (TW)

Tze-Chung Lin of Hsinchu City (TW)

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - A simplified explanation of the abstract

This abstract first appeared for US patent application 18526360 titled 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

Simplified Explanation

The method described in the abstract involves forming a fin structure over a substrate, including first and second semiconductor layers stacked alternately, then forming a dummy gate structure over the fin structure. A portion of the fin structure is removed, and a selective etching process is performed to laterally recess the first semiconductor layers by injecting a hydrogen-containing gas and an F gas. Inner spacers are formed on the laterally recessed first semiconductor layers, and the dummy gate structure and first semiconductor layers are replaced with a metal gate structure.

• Formation of fin structure with alternating semiconductor layers
• Use of selective etching process to laterally recess semiconductor layers
• Formation of inner spacers on recessed semiconductor layers
• Replacement of dummy gate structure with metal gate structure

Potential Applications

The technology described in the patent application could be applied in the semiconductor industry for advanced transistor fabrication processes.

Problems Solved

This technology helps in improving the performance and efficiency of semiconductor devices by enhancing the gate structure design.

Benefits

The benefits of this technology include increased transistor performance, improved power efficiency, and potentially reduced manufacturing costs.

Potential Commercial Applications

One potential commercial application of this technology could be in the production of high-performance integrated circuits for various electronic devices.

Possible Prior Art

Prior art in the field of semiconductor fabrication processes may include methods for forming gate structures and spacers in advanced transistor designs.

Unanswered Questions

How does this technology compare to existing methods for gate structure formation in semiconductor devices?

The article does not provide a direct comparison with existing methods, making it unclear how this technology stands out in the industry.

What are the specific performance improvements achieved by using this technology in semiconductor devices?

The article does not detail the specific performance enhancements resulting from the implementation of this technology, leaving this aspect unanswered.

Original Abstract Submitted

A method includes forming a fin structure over a substrate, wherein the fin structure comprises first semiconductor layers and second semiconductor layers alternately stacked over a substrate; forming a dummy gate structure over the fin structure; removing a portion of the fin structure uncovered by the dummy gate structure; performing a selective etching process to laterally recess the first semiconductor layers, including injecting a hydrogen-containing gas from a first gas source of a processing tool to the first semiconductor layers and the second semiconductor layers; and injecting an Fgas from a second gas source of the processing tool to the first semiconductor layers and the second semiconductor layers; forming inner spacers on opposite end surfaces of the laterally recessed first semiconductor layers of the fin structure; and replacing the dummy gate structure and the first semiconductor layers with a metal gate structure.