18524587. DATA SEQUENCING CIRCUIT AND METHOD simplified abstract (Taiwan Semiconductor Manufacturing Co., Ltd.)

DATA SEQUENCING CIRCUIT AND METHOD

Organization Name

Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor(s)

Hidehiro Fujiwara of Hsinchu (TW)

Haruki Mori of Hsinchu (TW)

Wei-Chang Zhao of Hsinchu (TW)

DATA SEQUENCING CIRCUIT AND METHOD - A simplified explanation of the abstract

This abstract first appeared for US patent application 18524587 titled 'DATA SEQUENCING CIRCUIT AND METHOD

Simplified Explanation

The circuit described in the abstract is designed to process data elements in a specific sequential order based on a selection signal generated by a signal generation portion. The selection signal includes two alternating sequences that determine the order in which the bits of each data element are outputted by the circuit.

• The data register receives and outputs successive data elements of a plurality of data elements in response to a clock signal.
• The first selection signal outputted by the signal generation portion includes two alternating sequences, with values incrementing and decrementing from zero to N-1, where N is the total number of bits in each data element.
• The selection circuit outputs the N bits of each data element in a first sequential order based on the first sequence of the first selection signal, and in a second sequential order opposite to the first order based on the second sequence of the first selection signal.

Potential Applications

This technology could be applied in data processing systems where the order of processing data elements is critical, such as in signal processing applications or data encryption systems.

Problems Solved

This technology solves the problem of efficiently processing data elements in a specific sequential order without the need for complex control logic or additional circuitry.

Benefits

The circuit provides a simple and effective solution for processing data elements in a predetermined order, improving the overall efficiency and performance of data processing systems.

Potential Commercial Applications

One potential commercial application of this technology could be in the development of high-speed data processing systems for telecommunications or networking equipment.

Possible Prior Art

One possible prior art for this technology could be similar circuit designs used in digital signal processing applications or data encryption systems.

How does this technology compare to existing data processing circuits in terms of speed and efficiency?

This article does not provide a direct comparison between this technology and existing data processing circuits in terms of speed and efficiency.

What are the potential limitations or drawbacks of implementing this technology in practical applications?

This article does not address any potential limitations or drawbacks of implementing this technology in practical applications.

Original Abstract Submitted

A circuit includes a data register configured to receive and output successive data elements of a plurality of data elements responsive to a clock signal, wherein each data element of the plurality of data elements includes a total number of bits N. A signal generation portion is configured to output a first selection signal responsive to the clock signal, the first selection signal includes two alternating sequences, values of the first sequence increment from zero to N−1, and values of the second sequence decrement from N−1 to zero. A selection circuit coupled to the data register is configured to output the N bits of each data element of the plurality of data elements in a first sequential order responsive to the first sequence of the first selection signal, and in a second sequential order opposite the first sequential order responsive to the second sequence of the first selection signal.